DE69427888D1 - Synchronisierte ein- und ausschaltbare Taktschaltung - Google Patents

Synchronisierte ein- und ausschaltbare Taktschaltung

Info

Publication number
DE69427888D1
DE69427888D1 DE69427888T DE69427888T DE69427888D1 DE 69427888 D1 DE69427888 D1 DE 69427888D1 DE 69427888 T DE69427888 T DE 69427888T DE 69427888 T DE69427888 T DE 69427888T DE 69427888 D1 DE69427888 D1 DE 69427888D1
Authority
DE
Germany
Prior art keywords
switched
clock circuit
synchronized clock
synchronized
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69427888T
Other languages
English (en)
Other versions
DE69427888T2 (de
Inventor
William M Lowe
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Advanced Micro Devices Inc
Original Assignee
Advanced Micro Devices Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advanced Micro Devices Inc filed Critical Advanced Micro Devices Inc
Application granted granted Critical
Publication of DE69427888D1 publication Critical patent/DE69427888D1/de
Publication of DE69427888T2 publication Critical patent/DE69427888T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/156—Arrangements in which a continuous pulse train is transformed into a train having a desired pattern
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/64—Generators producing trains of pulses, i.e. finite sequences of pulses
    • H03K3/66—Generators producing trains of pulses, i.e. finite sequences of pulses by interrupting the output of a generator
    • H03K3/70—Generators producing trains of pulses, i.e. finite sequences of pulses by interrupting the output of a generator time intervals between all adjacent pulses of one train being equal

Landscapes

  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Manipulation Of Pulses (AREA)
  • Electronic Switches (AREA)
  • Logic Circuits (AREA)
DE69427888T 1993-06-01 1994-05-09 Synchronisierte ein- und ausschaltbare Taktschaltung Expired - Fee Related DE69427888T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US08/069,521 US5414745A (en) 1993-06-01 1993-06-01 Synchronized clocking disable and enable circuit

Publications (2)

Publication Number Publication Date
DE69427888D1 true DE69427888D1 (de) 2001-09-13
DE69427888T2 DE69427888T2 (de) 2002-04-11

Family

ID=22089544

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69427888T Expired - Fee Related DE69427888T2 (de) 1993-06-01 1994-05-09 Synchronisierte ein- und ausschaltbare Taktschaltung

Country Status (4)

Country Link
US (1) US5414745A (de)
EP (1) EP0627816B1 (de)
JP (1) JPH0715293A (de)
DE (1) DE69427888T2 (de)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5675271A (en) * 1995-07-20 1997-10-07 Advanced Micro Devices, Inc. Extended chip select reset apparatus and method
US5900757A (en) * 1996-05-01 1999-05-04 Sun Microsystems, Inc. Clock stopping schemes for data buffer
US6085325A (en) * 1996-12-16 2000-07-04 Intel Corporation Method and apparatus for supporting power conservation operation modes
US5874843A (en) * 1997-05-28 1999-02-23 Taiwan Semiconductor Manufacturing Co., Ltd. Power-on reset circuit without an RC Network
US6105106A (en) 1997-12-31 2000-08-15 Micron Technology, Inc. Computer system, memory device and shift register including a balanced switching circuit with series connected transfer gates which are selectively clocked for fast switching times
FR2832567B1 (fr) * 2001-11-19 2004-04-02 Atmel Nantes Sa Circuit de generation d'impulsions, et composant micro-electronique correspondant
US6756827B2 (en) * 2002-09-11 2004-06-29 Broadcom Corporation Clock multiplier using masked control of clock pulses
US7861192B2 (en) * 2007-12-13 2010-12-28 Globalfoundries Inc. Technique to implement clock-gating using a common enable for a plurality of storage cells
US8519767B2 (en) * 2011-12-21 2013-08-27 Micron Technology, Inc. Methods, apparatuses, and circuits for bimodal disable circuits
US10311191B2 (en) 2017-01-26 2019-06-04 Advanced Micro Devices, Inc. Memory including side-car arrays with irregular sized entries

Family Cites Families (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US2519184A (en) * 1946-04-05 1950-08-15 Rca Corp Control system
US3885234A (en) * 1972-03-17 1975-05-20 Uro Electronics Ind Co Ltd Ultrasonic wave type alarm device for depicting a moving object
JPS56104529A (en) * 1980-01-24 1981-08-20 Yamatake Honeywell Co Ltd Flip-flop circuit
JPS5843187A (ja) * 1981-09-03 1983-03-12 Fuji Electric Co Ltd 可変周波発振方式
US4627085A (en) * 1984-06-29 1986-12-02 Applied Micro Circuits Corporation Flip-flop control circuit
DE3445107A1 (de) * 1984-12-11 1986-06-12 SYMPULS Gesellschaft für Pulstechnik und Meßsysteme mbH, 5100 Aachen Frequenzteiler
US4937504A (en) * 1988-08-31 1990-06-26 Honeywell Inc. Time delay initialization circuit
JPH02209008A (ja) * 1989-02-09 1990-08-20 Fujitsu Ltd クロック信号変換回路
US4974241A (en) * 1989-03-31 1990-11-27 Sgs-Thomson Microelectronics, Inc. Counter employing exclusive NOR gate and latches in combination
ES2080090T3 (es) * 1989-09-27 1996-02-01 Siemens Ag Alimentacion de impulsos de reloj para sistemas multiplex.
US5239206A (en) * 1990-03-06 1993-08-24 Advanced Micro Devices, Inc. Synchronous circuit with clock skew compensating function and circuits utilizing same
US5048065A (en) * 1990-03-12 1991-09-10 Westinghouse Electric Corp. Method and circuit for controlling the frequency of an electronic inverter
US5105108A (en) * 1990-11-14 1992-04-14 Zenith Electronics Corporation Delay circuit with phase locked loop control
US5157277A (en) * 1990-12-28 1992-10-20 Compaq Computer Corporation Clock buffer with adjustable delay and fixed duty cycle output
US5124597A (en) * 1991-04-01 1992-06-23 Tektronix, Inc. Timer circuit including an analog ramp generator and a CMOS counter
US5208546A (en) * 1991-08-21 1993-05-04 At&T Bell Laboratories Adaptive charge pump for phase-locked loops

Also Published As

Publication number Publication date
DE69427888T2 (de) 2002-04-11
US5414745A (en) 1995-05-09
JPH0715293A (ja) 1995-01-17
EP0627816A1 (de) 1994-12-07
EP0627816B1 (de) 2001-08-08

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Legal Events

Date Code Title Description
8339 Ceased/non-payment of the annual fee