DE69427265D1 - Superskalarbefehlsdekoder - Google Patents
SuperskalarbefehlsdekoderInfo
- Publication number
- DE69427265D1 DE69427265D1 DE69427265T DE69427265T DE69427265D1 DE 69427265 D1 DE69427265 D1 DE 69427265D1 DE 69427265 T DE69427265 T DE 69427265T DE 69427265 T DE69427265 T DE 69427265T DE 69427265 D1 DE69427265 D1 DE 69427265D1
- Authority
- DE
- Germany
- Prior art keywords
- superscalar
- command decoder
- decoder
- command
- superscalar command
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3818—Decoding for concurrent execution
- G06F9/382—Pipelined decoding, e.g. using predecoding
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30145—Instruction analysis, e.g. decoding, instruction word fields
- G06F9/30149—Instruction analysis, e.g. decoding, instruction word fields of variable length instructions
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30145—Instruction analysis, e.g. decoding, instruction word fields
- G06F9/30149—Instruction analysis, e.g. decoding, instruction word fields of variable length instructions
- G06F9/30152—Determining start or end of instruction; determining instruction length
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/3017—Runtime instruction translation, e.g. macros
- G06F9/30174—Runtime instruction translation, e.g. macros for non-native instruction set, e.g. Javabyte, legacy code
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3802—Instruction prefetching
- G06F9/3816—Instruction alignment, e.g. cache line crossing
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
- G06F9/3838—Dependency mechanisms, e.g. register scoreboarding
- G06F9/384—Register renaming
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3854—Instruction completion, e.g. retiring, committing or graduating
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3854—Instruction completion, e.g. retiring, committing or graduating
- G06F9/3856—Reordering of instructions, e.g. using queues or age tags
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3854—Instruction completion, e.g. retiring, committing or graduating
- G06F9/3858—Result writeback, i.e. updating the architectural state or memory
Landscapes
- Engineering & Computer Science (AREA)
- Software Systems (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Executing Machine-Instructions (AREA)
- Advance Control (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US14638393A | 1993-10-29 | 1993-10-29 |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69427265D1 true DE69427265D1 (de) | 2001-06-28 |
DE69427265T2 DE69427265T2 (de) | 2002-05-02 |
Family
ID=22517123
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69427265T Expired - Lifetime DE69427265T2 (de) | 1993-10-29 | 1994-09-20 | Superskalarbefehlsdekoder |
Country Status (4)
Country | Link |
---|---|
US (2) | US6189087B1 (de) |
EP (1) | EP0651320B1 (de) |
JP (1) | JPH07182163A (de) |
DE (1) | DE69427265T2 (de) |
Families Citing this family (77)
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US5920713A (en) * | 1995-10-06 | 1999-07-06 | Advanced Micro Devices, Inc. | Instruction decoder including two-way emulation code branching |
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US5787266A (en) * | 1996-02-20 | 1998-07-28 | Advanced Micro Devices, Inc. | Apparatus and method for accessing special registers without serialization |
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US5438668A (en) * | 1992-03-31 | 1995-08-01 | Seiko Epson Corporation | System and method for extraction, alignment and decoding of CISC instructions into a nano-instruction bucket for execution by a RISC computer |
US5337415A (en) | 1992-12-04 | 1994-08-09 | Hewlett-Packard Company | Predecoding instructions for supercalar dependency indicating simultaneous execution for increased operating frequency |
US5465373A (en) | 1993-01-08 | 1995-11-07 | International Business Machines Corporation | Method and system for single cycle dispatch of multiple instructions in a superscalar processor system |
IE80854B1 (en) | 1993-08-26 | 1999-04-07 | Intel Corp | Processor ordering consistency for a processor performing out-of-order instruction execution |
DE69429061T2 (de) | 1993-10-29 | 2002-07-18 | Advanced Micro Devices, Inc. | Superskalarmikroprozessoren |
US5632023A (en) | 1994-06-01 | 1997-05-20 | Advanced Micro Devices, Inc. | Superscalar microprocessor including flag operand renaming and forwarding apparatus |
-
1994
- 1994-09-20 EP EP94306884A patent/EP0651320B1/de not_active Expired - Lifetime
- 1994-09-20 DE DE69427265T patent/DE69427265T2/de not_active Expired - Lifetime
- 1994-10-26 JP JP6262437A patent/JPH07182163A/ja not_active Withdrawn
-
1997
- 1997-08-05 US US08/906,730 patent/US6189087B1/en not_active Expired - Lifetime
- 1997-08-06 US US08/912,622 patent/US5796973A/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
EP0651320B1 (de) | 2001-05-23 |
JPH07182163A (ja) | 1995-07-21 |
US5796973A (en) | 1998-08-18 |
US6189087B1 (en) | 2001-02-13 |
EP0651320A1 (de) | 1995-05-03 |
DE69427265T2 (de) | 2002-05-02 |
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