DE69330630D1 - Nichtleitende randschicht für integrierten stapel von ic chips - Google Patents
Nichtleitende randschicht für integrierten stapel von ic chipsInfo
- Publication number
- DE69330630D1 DE69330630D1 DE69330630T DE69330630T DE69330630D1 DE 69330630 D1 DE69330630 D1 DE 69330630D1 DE 69330630 T DE69330630 T DE 69330630T DE 69330630 T DE69330630 T DE 69330630T DE 69330630 D1 DE69330630 D1 DE 69330630D1
- Authority
- DE
- Germany
- Prior art keywords
- chips
- edge layer
- conductive edge
- integrated stack
- stack
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/065—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L25/0657—Stacked arrangements of devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/481—Internal lead connections, e.g. via connections, feedthrough structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/0401—Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16135—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/16145—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
- H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
- H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
- H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L2225/06503—Stacked arrangements of devices
- H01L2225/06524—Electrical connections formed on device or on substrate, e.g. a deposited or grown layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
- H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
- H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
- H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L2225/06503—Stacked arrangements of devices
- H01L2225/06527—Special adaptation of electrical connections, e.g. rewiring, engineering changes, pressure contacts, layout
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
- H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
- H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
- H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L2225/06503—Stacked arrangements of devices
- H01L2225/06541—Conductive via connections through the device, e.g. vertical interconnects, through silicon via [TSV]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
- H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
- H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
- H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L2225/06503—Stacked arrangements of devices
- H01L2225/06551—Conductive connections on the side of the device
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Wire Bonding (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US88466092A | 1992-05-15 | 1992-05-15 | |
PCT/US1993/004462 WO1993023873A1 (en) | 1992-05-15 | 1993-05-05 | Non-conductive end layer for integrated stack of ic chips |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69330630D1 true DE69330630D1 (de) | 2001-09-27 |
DE69330630T2 DE69330630T2 (de) | 2002-06-13 |
Family
ID=25385082
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69330630T Expired - Lifetime DE69330630T2 (de) | 1992-05-15 | 1993-05-05 | Nichtleitende randschicht für integrierten stapel von ic chips |
Country Status (5)
Country | Link |
---|---|
US (1) | US5424920A (de) |
EP (1) | EP0596075B1 (de) |
JP (1) | JP3544974B2 (de) |
DE (1) | DE69330630T2 (de) |
WO (1) | WO1993023873A1 (de) |
Families Citing this family (48)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5354695A (en) * | 1992-04-08 | 1994-10-11 | Leedy Glenn J | Membrane dielectric isolation IC fabrication |
JPH0715969B2 (ja) * | 1991-09-30 | 1995-02-22 | インターナショナル・ビジネス・マシーンズ・コーポレイション | マルチチツプ集積回路パツケージ及びそのシステム |
US6714625B1 (en) * | 1992-04-08 | 2004-03-30 | Elm Technology Corporation | Lithography device for semiconductor circuit pattern generation |
US5567654A (en) * | 1994-09-28 | 1996-10-22 | International Business Machines Corporation | Method and workpiece for connecting a thin layer to a monolithic electronic module's surface and associated module packaging |
US5592364A (en) * | 1995-01-24 | 1997-01-07 | Staktek Corporation | High density integrated circuit module with complex electrical interconnect rails |
US5763943A (en) * | 1996-01-29 | 1998-06-09 | International Business Machines Corporation | Electronic modules with integral sensor arrays |
JPH09283652A (ja) * | 1996-04-15 | 1997-10-31 | Nec Corp | 電子デバイス組立体 |
US5772835A (en) * | 1996-05-29 | 1998-06-30 | Ibm Corporation | Vacuum oven chamber for making laminated integrated circuit devices |
US5772815A (en) * | 1996-05-29 | 1998-06-30 | International Business Machines Corporation | Method for making laminated integrated circuit devices |
US5793116A (en) * | 1996-05-29 | 1998-08-11 | Mcnc | Microelectronic packaging using arched solder columns |
US5892203A (en) * | 1996-05-29 | 1999-04-06 | International Business Machines Corporation | Apparatus for making laminated integrated circuit devices |
US5735196A (en) * | 1996-05-29 | 1998-04-07 | Ibm Corporation | Apparatus for applying a force to laminated integrated circuit devices |
US5813113A (en) * | 1996-12-09 | 1998-09-29 | International Business Machines Corporation | Fixture for making laminated integrated circuit devices |
US5903437A (en) * | 1997-01-17 | 1999-05-11 | International Business Machines Corporation | High density edge mounting of chips |
US5818107A (en) * | 1997-01-17 | 1998-10-06 | International Business Machines Corporation | Chip stacking by edge metallization |
US5915167A (en) | 1997-04-04 | 1999-06-22 | Elm Technology Corporation | Three dimensional structure memory |
US6551857B2 (en) * | 1997-04-04 | 2003-04-22 | Elm Technology Corporation | Three dimensional structure integrated circuits |
US6215184B1 (en) * | 1998-02-19 | 2001-04-10 | Texas Instruments Incorporated | Optimized circuit design layout for high performance ball grid array packages |
US5990472A (en) * | 1997-09-29 | 1999-11-23 | Mcnc | Microelectronic radiation detectors for detecting and emitting radiation signals |
EP1025617B1 (de) * | 1997-10-27 | 2006-01-18 | Discovery Semiconductors, Inc. | Mikrosatelliten mit integrierten schaltkreisen |
US6617681B1 (en) | 1999-06-28 | 2003-09-09 | Intel Corporation | Interposer and method of making same |
US6404043B1 (en) * | 2000-06-21 | 2002-06-11 | Dense-Pac Microsystems, Inc. | Panel stacking of BGA devices to form three-dimensional modules |
US6674161B1 (en) * | 2000-10-03 | 2004-01-06 | Rambus Inc. | Semiconductor stacked die devices |
US7440449B2 (en) * | 2000-10-06 | 2008-10-21 | Irvine Sensors Corp. | High speed switching module comprised of stacked layers incorporating t-connect structures |
DE60108413T2 (de) * | 2000-11-10 | 2005-06-02 | Unitive Electronics, Inc. | Verfahren zum positionieren von komponenten mit hilfe flüssiger antriebsmittel und strukturen hierfür |
US6748994B2 (en) * | 2001-04-11 | 2004-06-15 | Avery Dennison Corporation | Label applicator, method and label therefor |
US6560109B2 (en) | 2001-09-07 | 2003-05-06 | Irvine Sensors Corporation | Stack of multilayer modules with heat-focusing metal layer |
US6717061B2 (en) | 2001-09-07 | 2004-04-06 | Irvine Sensors Corporation | Stacking of multilayer modules |
US6734370B2 (en) * | 2001-09-07 | 2004-05-11 | Irvine Sensors Corporation | Multilayer modules with flexible substrates |
WO2003063242A1 (en) * | 2002-01-16 | 2003-07-31 | Alfred E. Mann Foundation For Scientific Research | Space-saving packaging of electronic circuits |
US7511369B2 (en) * | 2002-04-22 | 2009-03-31 | Irvine Sensors Corp. | BGA-scale stacks comprised of layers containing integrated circuit die and a method for making the same |
US6806559B2 (en) * | 2002-04-22 | 2004-10-19 | Irvine Sensors Corporation | Method and apparatus for connecting vertically stacked integrated circuit chips |
US7777321B2 (en) * | 2002-04-22 | 2010-08-17 | Gann Keith D | Stacked microelectronic layer and module with three-axis channel T-connects |
US6960828B2 (en) | 2002-06-25 | 2005-11-01 | Unitive International Limited | Electronic structures including conductive shunt layers |
US7547623B2 (en) * | 2002-06-25 | 2009-06-16 | Unitive International Limited | Methods of forming lead free solder bumps |
US7531898B2 (en) * | 2002-06-25 | 2009-05-12 | Unitive International Limited | Non-Circular via holes for bumping pads and related structures |
US7402897B2 (en) | 2002-08-08 | 2008-07-22 | Elm Technology Corporation | Vertical system integration |
AU2003301632A1 (en) | 2002-10-22 | 2004-05-13 | Unitive International Limited | Stacked electronic structures including offset substrates |
TWI225899B (en) * | 2003-02-18 | 2005-01-01 | Unitive Semiconductor Taiwan C | Etching solution and method for manufacturing conductive bump using the etching solution to selectively remove barrier layer |
US20050046034A1 (en) | 2003-09-03 | 2005-03-03 | Micron Technology, Inc. | Apparatus and method for high density multi-chip structures |
US7049216B2 (en) * | 2003-10-14 | 2006-05-23 | Unitive International Limited | Methods of providing solder structures for out plane connections |
TW200603698A (en) | 2004-04-13 | 2006-01-16 | Unitive International Ltd | Methods of forming solder bumps on exposed metal pads and related structures |
US20060205170A1 (en) * | 2005-03-09 | 2006-09-14 | Rinne Glenn A | Methods of forming self-healing metal-insulator-metal (MIM) structures and related devices |
US7932615B2 (en) * | 2006-02-08 | 2011-04-26 | Amkor Technology, Inc. | Electronic devices including solder bumps on compliant dielectric layers |
US7674701B2 (en) | 2006-02-08 | 2010-03-09 | Amkor Technology, Inc. | Methods of forming metal layers using multi-layer lift-off patterns |
US7928549B2 (en) * | 2006-09-19 | 2011-04-19 | Taiwan Semiconductor Manufacturing Co., Ltd. | Integrated circuit devices with multi-dimensional pad structures |
DE102008016613B4 (de) * | 2008-04-01 | 2010-04-15 | Epcos Ag | Verfahren zur Herstellung eines elektrischen Bauelements mit mindestens einer dielektrischen Schicht und ein elektrisches Bauelement mit mindestens einer dielektrischen Schicht |
KR101774938B1 (ko) | 2011-08-31 | 2017-09-06 | 삼성전자 주식회사 | 지지대를 갖는 반도체 패키지 및 그 형성 방법 |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US2907926A (en) * | 1955-12-09 | 1959-10-06 | Ibm | Electrical circuit assembly |
DE3381187D1 (de) * | 1983-11-07 | 1990-03-08 | Irvine Sensors Corp | Detektoranordnungsstruktur und -herstellung. |
US4897708A (en) * | 1986-07-17 | 1990-01-30 | Laser Dynamics, Inc. | Semiconductor wafer array |
US4953005A (en) * | 1987-04-17 | 1990-08-28 | Xoc Devices, Inc. | Packaging system for stacking integrated circuits |
US5016138A (en) * | 1987-10-27 | 1991-05-14 | Woodman John K | Three dimensional integrated circuit package |
US4983533A (en) * | 1987-10-28 | 1991-01-08 | Irvine Sensors Corporation | High-density electronic modules - process and product |
US4794092A (en) * | 1987-11-18 | 1988-12-27 | Grumman Aerospace Corporation | Single wafer moated process |
JPH0217644A (ja) * | 1988-07-06 | 1990-01-22 | Hitachi Ltd | 集積回路 |
US5104820A (en) * | 1989-07-07 | 1992-04-14 | Irvine Sensors Corporation | Method of fabricating electronic circuitry unit containing stacked IC layers having lead rerouting |
-
1993
- 1993-05-05 EP EP93911250A patent/EP0596075B1/de not_active Expired - Lifetime
- 1993-05-05 JP JP50269194A patent/JP3544974B2/ja not_active Expired - Lifetime
- 1993-05-05 DE DE69330630T patent/DE69330630T2/de not_active Expired - Lifetime
- 1993-05-05 WO PCT/US1993/004462 patent/WO1993023873A1/en active IP Right Grant
-
1994
- 1994-04-25 US US08/232,739 patent/US5424920A/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
EP0596075A4 (en) | 1994-06-15 |
US5424920A (en) | 1995-06-13 |
EP0596075A1 (de) | 1994-05-11 |
EP0596075B1 (de) | 2001-08-22 |
WO1993023873A1 (en) | 1993-11-25 |
DE69330630T2 (de) | 2002-06-13 |
JP3544974B2 (ja) | 2004-07-21 |
JPH08500211A (ja) | 1996-01-09 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
DE69330630T2 (de) | Nichtleitende randschicht für integrierten stapel von ic chips | |
DE69308390D1 (de) | Packung für integrierte Schaltungschips | |
DE69533998D1 (de) | Entwurf von integrierten Halbleiterschaltungen | |
DE69327216T2 (de) | Chipkartemarkierungsverfahren | |
DE69529858D1 (de) | Oberflächenbehandlung für Halbleitersubstrat | |
DE69033909D1 (de) | Packung von Halbleiterchips | |
DE69402918D1 (de) | Substratfangvorrichtung und Keramikblatt für Halbleiterbearbeitungseinrichtung | |
DE68925156D1 (de) | Integrierte Halbleiterschaltung für neurales Netzwerk | |
KR910016236A (ko) | 반도체 집적회로 | |
DE69739359D1 (de) | Träger für die plattenrückseite einer ic-karte | |
DE69408657D1 (de) | TAB-Lötflächengeometrie für Halbleiterbauelemente | |
DE59308345D1 (de) | IC-Karte | |
DE69314533T2 (de) | IC-Karte | |
BR9603590A (pt) | Chip para cartão eletrónico e cartão eletrónico | |
DE69314466T2 (de) | Chip-Karte | |
DE69029107D1 (de) | Substrate für beta-Galactosidase | |
DE3675236D1 (de) | Kontaktloses testen von integrierten schaltungen. | |
DE69302994D1 (de) | Verzorgungsvorrichtung von Bauelement für integrierte Schaltung | |
DE69206331D1 (de) | Klebeband zum Befestigen von Halbleiterplättchen. | |
IT8522639A0 (it) | Dispositivo elettronico a semiconduttore per la protezione di circuiti integrati da scariche elettrostatiche e procedimento per la sua fabbricazione. | |
DE69232056D1 (de) | Halbleiter-bauteil zur begrenzung von spannungs-transienten | |
DE69528869D1 (de) | Flachgehäuse für Halbleiter-IC | |
DE59006579D1 (de) | Integrierte Begrenzerschaltung für Wechselspannungen. | |
DE69615273D1 (de) | Polieren der Randbereiche von Wafers | |
DE68905682D1 (de) | I/o-zellen fuer integrierte halbleiterschaltungen. |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8327 | Change in the person/name/address of the patent owner |
Owner name: APROLASE DEVELOPMENT CO., LLC, WILMINGTON, DEL, US |