DE69328414T2 - Multiplizierer mit Signed Digit Technik - Google Patents
Multiplizierer mit Signed Digit TechnikInfo
- Publication number
- DE69328414T2 DE69328414T2 DE69328414T DE69328414T DE69328414T2 DE 69328414 T2 DE69328414 T2 DE 69328414T2 DE 69328414 T DE69328414 T DE 69328414T DE 69328414 T DE69328414 T DE 69328414T DE 69328414 T2 DE69328414 T2 DE 69328414T2
- Authority
- DE
- Germany
- Prior art keywords
- multiplier
- signed digit
- digit technology
- technology
- signed
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M7/00—Conversion of a code where information is represented by a given sequence or number of digits to a code where the same, similar or subset of information is represented by a different sequence or number of digits
- H03M7/02—Conversion to or from weighted codes, i.e. the weight given to a digit depending on the position of the digit within the block or code word
- H03M7/04—Conversion to or from weighted codes, i.e. the weight given to a digit depending on the position of the digit within the block or code word the radix thereof being two
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/4824—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices using signed-digit representation
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Computational Mathematics (AREA)
- Mathematical Analysis (AREA)
- Mathematical Optimization (AREA)
- Pure & Applied Mathematics (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Complex Calculations (AREA)
- Logic Circuits (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP00496493A JP3153370B2 (ja) | 1993-01-14 | 1993-01-14 | 乗算装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69328414D1 DE69328414D1 (de) | 2000-05-25 |
DE69328414T2 true DE69328414T2 (de) | 2000-08-10 |
Family
ID=11598278
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69328414T Expired - Fee Related DE69328414T2 (de) | 1993-01-14 | 1993-12-17 | Multiplizierer mit Signed Digit Technik |
Country Status (4)
Country | Link |
---|---|
US (1) | US5473559A (de) |
EP (1) | EP0606611B1 (de) |
JP (1) | JP3153370B2 (de) |
DE (1) | DE69328414T2 (de) |
Families Citing this family (23)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5734600A (en) * | 1994-03-29 | 1998-03-31 | International Business Machines Corporation | Polynomial multiplier apparatus and method |
US5870322A (en) * | 1995-05-22 | 1999-02-09 | Samsung Electronics Co., Ltd. | Multiplier to selectively perform unsigned magnitude multiplication or signed magnitude multiplication |
US5646877A (en) * | 1995-05-25 | 1997-07-08 | Texas Instruments Incorporated | High radix multiplier architecture |
US5805482A (en) * | 1995-10-20 | 1998-09-08 | Matsushita Electric Corporation Of America | Inverse discrete cosine transform processor having optimum input structure |
US5867601A (en) * | 1995-10-20 | 1999-02-02 | Matsushita Electric Corporation Of America | Inverse discrete cosine transform processor using parallel processing |
US5801979A (en) * | 1995-10-20 | 1998-09-01 | Matsushita Electric Corporation Of America | Carry logic that produces a carry value from NLSBs for a ROM accumulator in an inverse discrete cosine transform processor |
US5754459A (en) * | 1996-02-08 | 1998-05-19 | Xilinx, Inc. | Multiplier circuit design for a programmable logic device |
JP3532338B2 (ja) * | 1996-02-27 | 2004-05-31 | 株式会社ルネサステクノロジ | 乗算装置 |
JP3604518B2 (ja) * | 1996-11-01 | 2004-12-22 | 株式会社ルネサステクノロジ | 除算装置 |
JPH10307705A (ja) * | 1997-05-02 | 1998-11-17 | Fujitsu Ltd | 冗長2進符号変換回路及びこれを用いた乗算回路 |
US6157939A (en) * | 1998-06-04 | 2000-12-05 | Integrated Device Technology, Inc. | Methods and apparatus for generating multiplicative inverse product |
US7203718B1 (en) * | 1999-10-29 | 2007-04-10 | Pentomics, Inc. | Apparatus and method for angle rotation |
EP1122637A3 (de) * | 2000-01-31 | 2005-10-12 | Micronas GmbH | Recheneinheit für eingeschränkte Signalverarbeitung |
US6684236B1 (en) * | 2000-02-15 | 2004-01-27 | Conexant Systems, Inc. | System of and method for efficiently performing computations through extended booth encoding of the operands thereto |
US6978426B2 (en) * | 2002-04-10 | 2005-12-20 | Broadcom Corporation | Low-error fixed-width modified booth multiplier |
DE102007056104A1 (de) * | 2007-11-15 | 2009-05-20 | Texas Instruments Deutschland Gmbh | Verfahren und Vorrichtung zur Multiplikation von Binäroperanden |
JP5261738B2 (ja) * | 2009-01-15 | 2013-08-14 | 国立大学法人広島大学 | 半導体装置 |
KR102057648B1 (ko) | 2013-01-04 | 2019-12-20 | 삼성전자주식회사 | 중복 형태 리코딩을 이용한 곱셈 방법 및 모듈러 곱셈기 |
US10003342B2 (en) | 2014-12-02 | 2018-06-19 | Taiwan Semiconductor Manufacturing Company, Ltd. | Compressor circuit and compressor circuit layout |
US10296292B2 (en) * | 2016-10-20 | 2019-05-21 | Advanced Micro Devices, Inc. | Dynamic variable precision computation |
US10756753B2 (en) * | 2018-10-25 | 2020-08-25 | Arm Limited | Data compressor logic circuit |
JP7371255B2 (ja) | 2019-11-21 | 2023-10-30 | 華為技術有限公司 | 乗算器及びオペレータ回路 |
TWI707543B (zh) | 2020-02-06 | 2020-10-11 | 崛智科技有限公司 | 壓縮器、加法電路及其操作方法 |
Family Cites Families (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0610787B2 (ja) * | 1987-01-23 | 1994-02-09 | 松下電器産業株式会社 | 乗算処理装置 |
US4864528A (en) * | 1986-07-18 | 1989-09-05 | Matsushita Electric Industrial Co., Ltd. | Arithmetic processor and multiplier using redundant signed digit arithmetic |
US4890127A (en) * | 1988-03-31 | 1989-12-26 | Texas Instruments Incorporated | Signed digit adder circuit |
GB8817766D0 (en) * | 1988-07-26 | 1989-07-05 | Emi Plc Thorn | Signal processing |
JPH072124B2 (ja) * | 1988-10-12 | 1995-01-18 | 菱有工業株式会社 | 小型携帯機器用加熱保温ケース |
JPH02300930A (ja) * | 1989-05-16 | 1990-12-13 | Oki Electric Ind Co Ltd | 乗算回路 |
JPH03177922A (ja) * | 1989-12-06 | 1991-08-01 | Sharp Corp | ワレスのトリー回路 |
JPH0720758Y2 (ja) * | 1990-09-28 | 1995-05-15 | 株式会社ダイヤ | 携帯用端末機用ケース |
-
1993
- 1993-01-14 JP JP00496493A patent/JP3153370B2/ja not_active Expired - Fee Related
- 1993-12-17 DE DE69328414T patent/DE69328414T2/de not_active Expired - Fee Related
- 1993-12-17 EP EP93120383A patent/EP0606611B1/de not_active Expired - Lifetime
- 1993-12-22 US US08/168,498 patent/US5473559A/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
DE69328414D1 (de) | 2000-05-25 |
EP0606611B1 (de) | 2000-04-19 |
JP3153370B2 (ja) | 2001-04-09 |
EP0606611A2 (de) | 1994-07-20 |
US5473559A (en) | 1995-12-05 |
EP0606611A3 (de) | 1994-11-02 |
JPH06214755A (ja) | 1994-08-05 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |