DE69325155D1 - Selbstgetakteter Bootstrap-Dekoder - Google Patents

Selbstgetakteter Bootstrap-Dekoder

Info

Publication number
DE69325155D1
DE69325155D1 DE69325155T DE69325155T DE69325155D1 DE 69325155 D1 DE69325155 D1 DE 69325155D1 DE 69325155 T DE69325155 T DE 69325155T DE 69325155 T DE69325155 T DE 69325155T DE 69325155 D1 DE69325155 D1 DE 69325155D1
Authority
DE
Germany
Prior art keywords
timed
self
bootstrap decoder
bootstrap
decoder
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69325155T
Other languages
English (en)
Other versions
DE69325155T2 (de
Inventor
Kim C Hardee
Kenneth J Mobley
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Promos Technologies Inc
Original Assignee
Nippon Steel Semiconductor Corp
United Memories Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Steel Semiconductor Corp, United Memories Inc filed Critical Nippon Steel Semiconductor Corp
Publication of DE69325155D1 publication Critical patent/DE69325155D1/de
Application granted granted Critical
Publication of DE69325155T2 publication Critical patent/DE69325155T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/408—Address circuits
    • G11C11/4087—Address decoders, e.g. bit - or word line decoders; Multiple line decoders
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/408—Address circuits
    • G11C11/4085—Word line control circuits, e.g. word line drivers, - boosters, - pull-up, - pull-down, - precharge
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/08—Word line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, for word lines
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/10—Decoders
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/18—Address timing or clocking circuits; Address control signal generation or management, e.g. for row address strobe [RAS] or column address strobe [CAS] signals

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Dram (AREA)
  • Logic Circuits (AREA)
DE69325155T 1993-02-17 1993-11-08 Selbstgetakteter Bootstrap-Dekoder Expired - Fee Related DE69325155T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US08/018,802 US5327026A (en) 1993-02-17 1993-02-17 Self-timed bootstrap decoder

Publications (2)

Publication Number Publication Date
DE69325155D1 true DE69325155D1 (de) 1999-07-08
DE69325155T2 DE69325155T2 (de) 2000-02-03

Family

ID=21789854

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69325155T Expired - Fee Related DE69325155T2 (de) 1993-02-17 1993-11-08 Selbstgetakteter Bootstrap-Dekoder

Country Status (5)

Country Link
US (1) US5327026A (de)
EP (1) EP0612075B1 (de)
JP (1) JPH06243681A (de)
KR (1) KR100280624B1 (de)
DE (1) DE69325155T2 (de)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3755911B2 (ja) * 1994-11-15 2006-03-15 富士通株式会社 半導体回路
US5694061A (en) * 1995-03-27 1997-12-02 Casio Computer Co., Ltd. Semiconductor device having same conductive type MIS transistors, a simple circuit design, and a high productivity
US6020763A (en) * 1996-04-23 2000-02-01 International Business Machines Corporation High speed decoder without race condition
US5793383A (en) * 1996-05-31 1998-08-11 Townsend And Townsend And Crew Llp Shared bootstrap circuit
KR100237624B1 (ko) * 1996-10-30 2000-01-15 김영환 반도체 메모리장치의 로우 디코더
JP3422921B2 (ja) * 1997-12-25 2003-07-07 シャープ株式会社 半導体集積回路
US6278297B1 (en) * 1999-09-14 2001-08-21 Texas Instruments Incorporated Row decoder with switched power supply
US6275442B1 (en) * 2000-05-16 2001-08-14 Hewlett-Packard Company Address decoder and method for ITS accelerated stress testing
KR100407564B1 (ko) * 2000-10-30 2003-12-01 삼성전자주식회사 반도체 메모리 장치의 서브-워드 라인 구동 회로
US6690148B2 (en) * 2001-11-28 2004-02-10 Micron Technology, Inc. Method and circuit for limiting a pumped voltage
TWI340981B (en) * 2008-11-12 2011-04-21 Ind Tech Res Inst Memory with improved write current

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4570244A (en) * 1980-07-28 1986-02-11 Inmos Corporation Bootstrap driver for a static RAM
US4673829A (en) * 1982-02-08 1987-06-16 Seeq Technology, Inc. Charge pump for providing programming voltage to the word lines in a semiconductor memory array
US4692638A (en) * 1984-07-02 1987-09-08 Texas Instruments Incorporated CMOS/NMOS decoder and high-level driver circuit
US4678941A (en) * 1985-04-25 1987-07-07 International Business Machines Corporation Boost word-line clock and decoder-driver circuits in semiconductor memories
US5051959A (en) * 1985-08-14 1991-09-24 Fujitsu Limited Complementary semiconductor memory device including cell access transistor and word line driving transistor having channels of different conductivity type
EP0444602B1 (de) * 1990-02-26 1996-05-15 Nec Corporation Dekodierschaltung
US5103113A (en) * 1990-06-13 1992-04-07 Texas Instruments Incorporated Driving circuit for providing a voltage boasted over the power supply voltage source as a driving signal
US5166554A (en) * 1990-10-02 1992-11-24 Reddy Chitranjan N Boot-strapped decoder circuit

Also Published As

Publication number Publication date
EP0612075A2 (de) 1994-08-24
KR940020425A (ko) 1994-09-16
EP0612075A3 (de) 1995-02-15
KR100280624B1 (ko) 2001-02-01
EP0612075B1 (de) 1999-06-02
DE69325155T2 (de) 2000-02-03
US5327026A (en) 1994-07-05
JPH06243681A (ja) 1994-09-02

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: MOSEL VITELIC INC., HSINCHU, TW

8328 Change in the person/name/address of the agent

Representative=s name: WEICKMANN & WEICKMANN, 81679 MUENCHEN

8327 Change in the person/name/address of the patent owner

Owner name: PROMOS TECHNOLOGIES, INC., HSINCHU, TW

8339 Ceased/non-payment of the annual fee