DE69031615D1 - Dekodierer - Google Patents

Dekodierer

Info

Publication number
DE69031615D1
DE69031615D1 DE69031615T DE69031615T DE69031615D1 DE 69031615 D1 DE69031615 D1 DE 69031615D1 DE 69031615 T DE69031615 T DE 69031615T DE 69031615 T DE69031615 T DE 69031615T DE 69031615 D1 DE69031615 D1 DE 69031615D1
Authority
DE
Germany
Prior art keywords
decoder
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69031615T
Other languages
English (en)
Other versions
DE69031615T2 (de
Inventor
Richard Matthew Forsyth
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics Ltd Great Britain
Original Assignee
SGS Thomson Microelectronics Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by SGS Thomson Microelectronics Ltd filed Critical SGS Thomson Microelectronics Ltd
Publication of DE69031615D1 publication Critical patent/DE69031615D1/de
Application granted granted Critical
Publication of DE69031615T2 publication Critical patent/DE69031615T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/52—Multiplying; Dividing
    • G06F7/535—Dividing only
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/02—Digital function generators
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/60—Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2207/00—Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F2207/535—Indexing scheme relating to groups G06F7/535 - G06F7/5375
    • G06F2207/5352—Non-restoring division not covered by G06F7/5375

Landscapes

  • Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Pure & Applied Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Computing Systems (AREA)
  • Mathematical Physics (AREA)
  • Error Detection And Correction (AREA)
  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
DE69031615T 1990-02-14 1990-12-21 Dekodierer Expired - Fee Related DE69031615T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB909003322A GB9003322D0 (en) 1990-02-14 1990-02-14 Decoder

Publications (2)

Publication Number Publication Date
DE69031615D1 true DE69031615D1 (de) 1997-11-27
DE69031615T2 DE69031615T2 (de) 1998-06-04

Family

ID=10670964

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69031615T Expired - Fee Related DE69031615T2 (de) 1990-02-14 1990-12-21 Dekodierer

Country Status (5)

Country Link
US (1) US5148480A (de)
EP (1) EP0442220B1 (de)
JP (1) JP2991788B2 (de)
DE (1) DE69031615T2 (de)
GB (1) GB9003322D0 (de)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5532947A (en) * 1995-01-25 1996-07-02 International Business Machines Corporation Combined decoder/adder circuit which provides improved access speed to a cache
CN102812431A (zh) 2010-03-22 2012-12-05 Lrdc系统有限公司 用于识别与保护一组源数据的完整性的方法
RU2547231C1 (ru) * 2014-04-02 2015-04-10 Федеральное Государственное Бюджетное Образовательное Учреждение Высшего Профессионального Образования "Донской Государственный Технический Университет" (Дгту) Дешифратор 2 в 4

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3372377A (en) * 1965-08-02 1968-03-05 Sperry Rand Corp Data processing system
DE1512606A1 (de) * 1967-05-24 1969-06-12 Telefunken Patent Verknuepfungsbaustein
US3541314A (en) * 1968-02-09 1970-11-17 Webb James E Decoder system
US3694642A (en) * 1970-05-04 1972-09-26 Computer Design Corp Add/subtract apparatus for binary coded decimal numbers
US3748649A (en) * 1972-02-29 1973-07-24 Bell Telephone Labor Inc Translator memory decoding arrangement for a microprogram controlled processor
US4187549A (en) * 1978-09-05 1980-02-05 The United States Of America As Represented By The Secretary Of The Navy Double precision residue combiners/coders
ATE43020T1 (de) * 1985-02-11 1989-05-15 Siemens Ag Verfahren und schaltungsanordnung zur ueberwachung der summe bzw. differenz zweier groessen durch vergleich mit einer dritten groesse in binaerer darstellung.
JPH0799808B2 (ja) * 1986-02-13 1995-10-25 三菱電機株式会社 算術論理演算装置
US4873660A (en) * 1986-06-27 1989-10-10 Matsushita Electric Industrial Co., Ltd. Arithmetic processor using redundant signed digit arithmetic
US4918638A (en) * 1986-10-15 1990-04-17 Matsushita Electric Industrial Co., Ltd. Multiplier in a galois field

Also Published As

Publication number Publication date
JP2991788B2 (ja) 1999-12-20
EP0442220A2 (de) 1991-08-21
EP0442220A3 (en) 1992-12-09
GB9003322D0 (en) 1990-04-11
DE69031615T2 (de) 1998-06-04
EP0442220B1 (de) 1997-10-22
US5148480A (en) 1992-09-15
JPH04227336A (ja) 1992-08-17

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee