DE69323111T2 - Auflösung der Mehrdeutigkeit für Kontrolle eines elastischen Speichers für Untersystemeinheit - Google Patents

Auflösung der Mehrdeutigkeit für Kontrolle eines elastischen Speichers für Untersystemeinheit

Info

Publication number
DE69323111T2
DE69323111T2 DE69323111T DE69323111T DE69323111T2 DE 69323111 T2 DE69323111 T2 DE 69323111T2 DE 69323111 T DE69323111 T DE 69323111T DE 69323111 T DE69323111 T DE 69323111T DE 69323111 T2 DE69323111 T2 DE 69323111T2
Authority
DE
Germany
Prior art keywords
ambiguity
resolution
control
elastic memory
subsystem unit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69323111T
Other languages
English (en)
Other versions
DE69323111D1 (de
Inventor
Ertugrul Baydar
William Bernard Weeber
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Alcatel Lucent SAS
Original Assignee
Alcatel CIT SA
Alcatel SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Alcatel CIT SA, Alcatel SA filed Critical Alcatel CIT SA
Application granted granted Critical
Publication of DE69323111D1 publication Critical patent/DE69323111D1/de
Publication of DE69323111T2 publication Critical patent/DE69323111T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F5/00—Methods or arrangements for data conversion without changing the order or content of the data handled
    • G06F5/06—Methods or arrangements for data conversion without changing the order or content of the data handled for changing the speed of data flow, i.e. speed regularising or timing, e.g. delay lines, FIFO buffers; over- or underrun control therefor
    • G06F5/10—Methods or arrangements for data conversion without changing the order or content of the data handled for changing the speed of data flow, i.e. speed regularising or timing, e.g. delay lines, FIFO buffers; over- or underrun control therefor having a sequence of storage locations each being individually accessible for both enqueue and dequeue operations, e.g. using random access memory
    • G06F5/12—Means for monitoring the fill level; Means for resolving contention, i.e. conflicts between simultaneous enqueue and dequeue operations
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/06—Synchronising arrangements
    • H04J3/062—Synchronisation of signals having the same nominal but fluctuating bit rates, e.g. using buffers
    • H04J3/0623—Synchronous multiplexing systems, e.g. synchronous digital hierarchy/synchronous optical network (SDH/SONET), synchronisation with a pointer process
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2205/00—Indexing scheme relating to group G06F5/00; Methods or arrangements for data conversion without changing the order or content of the data handled
    • G06F2205/12—Indexing scheme relating to groups G06F5/12 - G06F5/14
    • G06F2205/123—Contention resolution, i.e. resolving conflicts between simultaneous read and write operations

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Time-Division Multiplex Systems (AREA)
  • Apparatus For Radiation Diagnosis (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Oscillators With Electromechanical Resonators (AREA)
  • Facsimile Scanning Arrangements (AREA)
  • Radar Systems Or Details Thereof (AREA)
  • Medical Treatment And Welfare Office Work (AREA)
DE69323111T 1992-05-21 1993-05-15 Auflösung der Mehrdeutigkeit für Kontrolle eines elastischen Speichers für Untersystemeinheit Expired - Lifetime DE69323111T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/887,348 US5706299A (en) 1992-05-21 1992-05-21 Sonet tributary ambiguity resolution for elastic store control

Publications (2)

Publication Number Publication Date
DE69323111D1 DE69323111D1 (de) 1999-03-04
DE69323111T2 true DE69323111T2 (de) 1999-07-01

Family

ID=25390953

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69323111T Expired - Lifetime DE69323111T2 (de) 1992-05-21 1993-05-15 Auflösung der Mehrdeutigkeit für Kontrolle eines elastischen Speichers für Untersystemeinheit

Country Status (6)

Country Link
US (1) US5706299A (de)
EP (1) EP0570877B1 (de)
AT (1) ATE176112T1 (de)
CA (1) CA2096717C (de)
DE (1) DE69323111T2 (de)
ES (1) ES2127229T3 (de)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6145061A (en) * 1998-01-07 2000-11-07 Tandem Computers Incorporated Method of management of a circular queue for asynchronous access
FI982040A (fi) 1998-09-22 2000-03-23 Nokia Multimedia Network Terminals Oy Menetelmä ja laite datavirran synkronoimiseksi
JP3818884B2 (ja) * 2001-09-19 2006-09-06 富士通株式会社 伝送装置
EP1396786A1 (de) * 2002-09-03 2004-03-10 STMicroelectronics Limited Brückenschaltung zur Neutaktung in einer integrierten Halbleiterschaltung
US7839885B2 (en) * 2005-04-25 2010-11-23 Lsi Corporation Connection memory for tributary time-space switches

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4054747A (en) * 1976-05-20 1977-10-18 Gte Automatic Electric Laboratories Incorporated Data buffer
US4748588A (en) * 1985-12-18 1988-05-31 International Business Machines Corp. Fast data synchronizer
EP0396669B1 (de) * 1988-10-14 1995-06-28 Digital Equipment Corporation Verfahren und anordnung zur wahrnehmung bevorstehender überläufe und/oder unterschreitungen eines elastischen puffers
US5142529A (en) * 1988-12-09 1992-08-25 Transwitch Corporation Method and means for transferring a data payload from a first SONET signal to a SONET signal of different frequency
US4928275A (en) * 1989-05-26 1990-05-22 Northern Telecom Limited Synchronization of asynchronous data signals
US5210762A (en) * 1991-10-02 1993-05-11 Alcatel Network Systems, Inc. Sonet pointer interpretation system and method

Also Published As

Publication number Publication date
ATE176112T1 (de) 1999-02-15
CA2096717C (en) 1999-02-16
EP0570877B1 (de) 1999-01-20
EP0570877A1 (de) 1993-11-24
US5706299A (en) 1998-01-06
CA2096717A1 (en) 1993-11-22
ES2127229T3 (es) 1999-04-16
DE69323111D1 (de) 1999-03-04

Similar Documents

Publication Publication Date Title
DE69430599T2 (de) Dynamisch ausbaubares Speichereinheitsmatrixsystem
CA2053693A1 (en) Address protection circuit
DE69512459D1 (de) RAID 5 - Plattenspeicheranordnung mit Paritätscachespeicher mit freien Blöcken
FR2373830A1 (fr) Systeme d'adressage associatif par page et dispositif de memoire hierarchique a deux niveaux en portant application
DE69530405D1 (de) Schnappschuss von auf einem massenspeichersystem gespeicherten daten
ATE189744T1 (de) Speichersteuerungseinheit und speichereinheit
ATE136676T1 (de) Anzeigesystem
GB1505580A (en) Data processing apparatus
YU47428B (sh) Uredjaj za povećanu raspoloživost operanda u sistemu za obradu podataka
DE69323111T2 (de) Auflösung der Mehrdeutigkeit für Kontrolle eines elastischen Speichers für Untersystemeinheit
KR910001542A (ko) 정보 처리 장치의 비교 체크 기능 검사를 위한 시스템
ES8201343A1 (es) 2 mejoras en los sistemas de control para tratamiento de da-tos, para una memoria amortiguadora del sistema de permuta
DE3579103D1 (de) Videosignalverarbeitungskreise.
SE9501015L (sv) Anordning och förfarande avseende hantering av digitala signaler och en behandlingsanordning omfattande en dylik
GB9724033D0 (en) Method and apparatus for controlling shared memory access
DE68925524D1 (de) System zum Detektieren, dass Daten in einem Pufferspeicher gelöscht worden sind, insbesondere für einen Datenschalter
KR930008623A (ko) 화상회전, 처리장치
KR960011728A (ko) 메모리 액세스방법 및 장치
JPS56145583A (en) Buffer memory device
JPS57179999A (en) Control system for storage device
JPS56159896A (en) Data processing system
JPS6474641A (en) Memory access control system
JPH04218846A (ja) ストアバッファ
KR910003495A (ko) 소형의 고속 록어사이드 데이타 캐시 메모리
JPS57201000A (en) Bit shift control system of sequential access memory

Legal Events

Date Code Title Description
8327 Change in the person/name/address of the patent owner

Owner name: ALCATEL, PARIS, FR

8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: ALCATEL LUCENT, PARIS, FR