DE69320741T2 - Verfahren und Einrichtung zur Emulation der Umgebung eines Mikroprozessors - Google Patents
Verfahren und Einrichtung zur Emulation der Umgebung eines MikroprozessorsInfo
- Publication number
- DE69320741T2 DE69320741T2 DE69320741T DE69320741T DE69320741T2 DE 69320741 T2 DE69320741 T2 DE 69320741T2 DE 69320741 T DE69320741 T DE 69320741T DE 69320741 T DE69320741 T DE 69320741T DE 69320741 T2 DE69320741 T2 DE 69320741T2
- Authority
- DE
- Germany
- Prior art keywords
- microprocessor
- takeover
- host processor
- interrupt
- bus
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/36—Preventing errors by testing or debugging software
- G06F11/3664—Environments for testing or debugging software
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
- G06F11/26—Functional testing
- G06F11/261—Functional testing by simulating additional hardware, e.g. fault simulation
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Computer Hardware Design (AREA)
- General Engineering & Computer Science (AREA)
- Quality & Reliability (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Debugging And Monitoring (AREA)
- Test And Diagnosis Of Digital Computers (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US07/945,214 US5390332A (en) | 1992-09-15 | 1992-09-15 | Method and apparatus for performing a takeover of a microprocessor |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69320741D1 DE69320741D1 (de) | 1998-10-08 |
DE69320741T2 true DE69320741T2 (de) | 1999-05-06 |
Family
ID=25482797
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69320741T Expired - Fee Related DE69320741T2 (de) | 1992-09-15 | 1993-07-08 | Verfahren und Einrichtung zur Emulation der Umgebung eines Mikroprozessors |
Country Status (4)
Country | Link |
---|---|
US (1) | US5390332A (de) |
EP (1) | EP0588473B1 (de) |
JP (1) | JPH06242987A (de) |
DE (1) | DE69320741T2 (de) |
Families Citing this family (16)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5530891A (en) * | 1994-05-31 | 1996-06-25 | Advanced Micro Devices | System management interrupt mechanism within a symmetrical multiprocessing system |
WO1996018953A1 (en) * | 1994-12-12 | 1996-06-20 | Intel Corporation | Cpu-cycle stealing for multi-tasking operating system |
US5684948A (en) * | 1995-09-01 | 1997-11-04 | National Semiconductor Corporation | Memory management circuit which provides simulated privilege levels |
US5819067A (en) * | 1996-02-23 | 1998-10-06 | Advanced Micro Devices, Inc. | Computer system configured to translate a computer program into a second computer program prior to executing the computer program |
DE69704004T2 (de) * | 1996-06-19 | 2001-06-07 | Matsushita Electric Ind Co Ltd | Vorrichtung zur Programmfehlerbeseitigung |
US5901293A (en) * | 1996-06-25 | 1999-05-04 | Claxton; Daniel Dean | Bus interface controller for serially-accessed variable-access-time memory device |
US5790837A (en) * | 1996-09-11 | 1998-08-04 | Ensoniq Corporation | Method and system for device virtualization based on an interrupt request in a dos-based environment |
US5937185A (en) * | 1996-09-11 | 1999-08-10 | Creative Technology, Inc. | Method and system for device virtualization based on an interrupt request in a DOS-based environment |
US5951696A (en) * | 1996-11-14 | 1999-09-14 | Hewlett-Packard Company | Debug system with hardware breakpoint trap |
US5987495A (en) * | 1997-11-07 | 1999-11-16 | International Business Machines Corporation | Method and apparatus for fully restoring a program context following an interrupt |
GB9805482D0 (en) | 1998-03-13 | 1998-05-13 | Sgs Thomson Microelectronics | Microcomputer |
DE19954407A1 (de) * | 1999-11-12 | 2001-05-17 | Gfs Systemtechnik Gmbh & Co Kg | Verfahren zum direkten Aufrufen einer Funktion mittels eines Softwaremoduls durch einen Prozessor mit einer Memory-Management-Unit (MMU) |
US6601122B1 (en) | 2000-04-17 | 2003-07-29 | International Business Machines Corporation | Exceptions and interrupts with dynamic priority and vector routing |
US7162615B1 (en) * | 2000-06-12 | 2007-01-09 | Mips Technologies, Inc. | Data transfer bus communication using single request to perform command and return data to destination indicated in context to allow thread context switch |
US6915414B2 (en) * | 2001-07-20 | 2005-07-05 | Zilog, Inc. | Context switching pipelined microprocessor |
US9665466B2 (en) | 2014-09-02 | 2017-05-30 | Nxp Usa, Inc. | Debug architecture for multithreaded processors |
Family Cites Families (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3940743A (en) * | 1973-11-05 | 1976-02-24 | Digital Equipment Corporation | Interconnecting unit for independently operable data processing systems |
US4015243A (en) * | 1975-06-02 | 1977-03-29 | Kurpanek Horst G | Multi-processing computer system |
DE2546202A1 (de) * | 1975-10-15 | 1977-04-28 | Siemens Ag | Rechnersystem aus mehreren miteinander verbundenen und zusammenwirkenden einzelrechnern und verfahren zum betrieb des rechnersystems |
US4296466A (en) * | 1978-01-23 | 1981-10-20 | Data General Corporation | Data processing system including a separate input/output processor with micro-interrupt request apparatus |
US4268902A (en) * | 1978-10-23 | 1981-05-19 | International Business Machines Corporation | Maintenance interface for a service processor-central processing unit computer system |
US4701845A (en) * | 1984-10-25 | 1987-10-20 | Unisys Corporation | User interface processor for computer network with maintenance and programmable interrupt capability |
US4779187A (en) * | 1985-04-10 | 1988-10-18 | Microsoft Corporation | Method and operating system for executing programs in a multi-mode microprocessor |
US5053949A (en) * | 1989-04-03 | 1991-10-01 | Motorola, Inc. | No-chip debug peripheral which uses externally provided instructions to control a core processing unit |
US5008805A (en) * | 1989-08-03 | 1991-04-16 | International Business Machines Corporation | Real time, fail safe process control system and method |
DE9203527U1 (de) * | 1992-03-17 | 1993-04-15 | Sack, Hansjoerg, 4792 Bad Lippspringe, De |
-
1992
- 1992-09-15 US US07/945,214 patent/US5390332A/en not_active Expired - Lifetime
-
1993
- 1993-07-08 EP EP93305352A patent/EP0588473B1/de not_active Expired - Lifetime
- 1993-07-08 DE DE69320741T patent/DE69320741T2/de not_active Expired - Fee Related
- 1993-09-09 JP JP5247353A patent/JPH06242987A/ja active Pending
Also Published As
Publication number | Publication date |
---|---|
US5390332A (en) | 1995-02-14 |
EP0588473B1 (de) | 1998-09-02 |
EP0588473A1 (de) | 1994-03-23 |
DE69320741D1 (de) | 1998-10-08 |
JPH06242987A (ja) | 1994-09-02 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |