DE69319267T2 - Verfahren zur Herstellung eines Transistors mit schwebendem Gate - Google Patents

Verfahren zur Herstellung eines Transistors mit schwebendem Gate

Info

Publication number
DE69319267T2
DE69319267T2 DE69319267T DE69319267T DE69319267T2 DE 69319267 T2 DE69319267 T2 DE 69319267T2 DE 69319267 T DE69319267 T DE 69319267T DE 69319267 T DE69319267 T DE 69319267T DE 69319267 T2 DE69319267 T2 DE 69319267T2
Authority
DE
Germany
Prior art keywords
oxide
silicon layer
tunnel
gate electrode
floating gate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69319267T
Other languages
German (de)
English (en)
Other versions
DE69319267D1 (de
Inventor
Robertus Dominicus Jos Verhaar
Andrew Jan Walker
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Koninklijke Philips NV
Original Assignee
Philips Electronics NV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Philips Electronics NV filed Critical Philips Electronics NV
Publication of DE69319267D1 publication Critical patent/DE69319267D1/de
Application granted granted Critical
Publication of DE69319267T2 publication Critical patent/DE69319267T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/68—Floating-gate IGFETs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/01—Manufacture or treatment
    • H10D64/013—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator
    • H10D64/01302—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H10D64/01332—Making the insulator
    • H10D64/01336—Making the insulator on single crystalline silicon, e.g. chemical oxidation using a liquid
    • H10D64/01338—Making the insulator on single crystalline silicon, e.g. chemical oxidation using a liquid with a treatment, e.g. annealing, after the formation of the conductor
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/0411—Manufacture or treatment of FETs having insulated gates [IGFET] of FETs having floating gates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/68—Floating-gate IGFETs
    • H10D30/681—Floating-gate IGFETs having only two programming levels
    • H10D30/682—Floating-gate IGFETs having only two programming levels programmed by injection of carriers through a conductive insulator, e.g. Poole-Frankel conduction
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/01—Manufacture or treatment
    • H10D64/031—Manufacture or treatment of data-storage electrodes
    • H10D64/035—Manufacture or treatment of data-storage electrodes comprising conductor-insulator-conductor-insulator-semiconductor structures
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/60—Electrodes characterised by their materials
    • H10D64/66—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
    • H10D64/68—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator

Landscapes

  • Non-Volatile Memory (AREA)
  • Electrical Discharge Machining, Electrochemical Machining, And Combined Machining (AREA)
DE69319267T 1992-03-12 1993-03-04 Verfahren zur Herstellung eines Transistors mit schwebendem Gate Expired - Fee Related DE69319267T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP92200707 1992-03-12

Publications (2)

Publication Number Publication Date
DE69319267D1 DE69319267D1 (de) 1998-07-30
DE69319267T2 true DE69319267T2 (de) 1999-03-04

Family

ID=8210476

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69319267T Expired - Fee Related DE69319267T2 (de) 1992-03-12 1993-03-04 Verfahren zur Herstellung eines Transistors mit schwebendem Gate

Country Status (8)

Country Link
US (1) US5371027A (enExample)
EP (1) EP0560435B1 (enExample)
JP (1) JPH0629544A (enExample)
KR (1) KR100262830B1 (enExample)
AT (1) ATE167756T1 (enExample)
CA (1) CA2091332C (enExample)
DE (1) DE69319267T2 (enExample)
TW (1) TW220007B (enExample)

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
BE1007475A3 (nl) * 1993-09-06 1995-07-11 Philips Electronics Nv Halfgeleiderinrichting met een niet-vluchtig geheugen en werkwijze ter vervaardiging van een dergelijke halfgeleiderinrichting.
KR0149527B1 (ko) * 1994-06-15 1998-10-01 김주용 반도체 소자의 고전압용 트랜지스터 및 그 제조방법
US5554551A (en) * 1994-11-23 1996-09-10 United Microelectronics Corporation Method of manufacture of an EEPROM cell with self-aligned thin dielectric area
US5460991A (en) * 1995-03-16 1995-10-24 United Microelectronics Corporation Method of making high coupling ratio flash EEPROM device
US5726070A (en) * 1995-09-06 1998-03-10 United Microelectronics Corporation Silicon-rich tunnel oxide formed by oxygen implantation for flash EEPROM
JP3383140B2 (ja) 1995-10-02 2003-03-04 株式会社東芝 不揮発性半導体記憶装置の製造方法
EP0833393B1 (en) 1996-09-30 2011-12-14 STMicroelectronics Srl Floating gate non-volatile memory cell with low erasing voltage and manufacturing method
US6072720A (en) * 1998-12-04 2000-06-06 Gatefield Corporation Nonvolatile reprogrammable interconnect cell with programmable buried bitline
US6232630B1 (en) 1999-07-07 2001-05-15 Advanced Micro Devices, Inc. Light floating gate doping to improve tunnel oxide reliability
KR100383083B1 (ko) * 2000-09-05 2003-05-12 아남반도체 주식회사 저전압 구동 플래쉬 메모리 및 그 제조 방법
JP2003023113A (ja) * 2001-07-05 2003-01-24 Mitsubishi Electric Corp 半導体装置およびその製造方法
US20050156228A1 (en) * 2004-01-16 2005-07-21 Jeng Erik S. Manufacture method and structure of a nonvolatile memory
KR100564629B1 (ko) * 2004-07-06 2006-03-28 삼성전자주식회사 이이피롬 소자 및 그 제조 방법
KR102446409B1 (ko) * 2015-09-18 2022-09-22 삼성전자주식회사 시냅스 메모리 소자의 제조방법

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS497870B1 (enExample) * 1969-06-06 1974-02-22
GB1596184A (en) * 1976-11-27 1981-08-19 Fujitsu Ltd Method of manufacturing semiconductor devices
JPS583290A (ja) * 1981-06-29 1983-01-10 インタ−ナシヨナル・ビジネス・マシ−ンズ・コ−ポレ−シヨン メモリ・アレイ
US5210042A (en) * 1983-09-26 1993-05-11 Fujitsu Limited Method of producing semiconductor device
US4717943A (en) * 1984-06-25 1988-01-05 International Business Machines Charge storage structure for nonvolatile memories
JPH0750693B2 (ja) * 1985-12-02 1995-05-31 日本テキサス・インスツルメンツ株式会社 酸化シリコン膜の製造方法
CA1276314C (en) * 1988-03-24 1990-11-13 Alexander Kalnitsky Silicon ion implanted semiconductor device
US5236851A (en) * 1988-07-14 1993-08-17 Matsushita Electric Industrial Co., Ltd. Method for fabricating semiconductor devices
US5250455A (en) * 1990-04-10 1993-10-05 Matsushita Electric Industrial Co., Ltd. Method of making a nonvolatile semiconductor memory device by implanting into the gate insulating film
US5147813A (en) * 1990-08-15 1992-09-15 Intel Corporation Erase performance improvement via dual floating gate processing

Also Published As

Publication number Publication date
KR930020733A (ko) 1993-10-20
ATE167756T1 (de) 1998-07-15
DE69319267D1 (de) 1998-07-30
EP0560435A3 (en) 1994-08-24
EP0560435B1 (en) 1998-06-24
JPH0629544A (ja) 1994-02-04
KR100262830B1 (ko) 2000-08-01
TW220007B (enExample) 1994-02-01
CA2091332A1 (en) 1993-09-13
US5371027A (en) 1994-12-06
CA2091332C (en) 2002-01-29
EP0560435A2 (en) 1993-09-15

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: KONINKLIJKE PHILIPS ELECTRONICS N.V., EINDHOVEN, N

8320 Willingness to grant licences declared (paragraph 23)
8339 Ceased/non-payment of the annual fee