DE69314013D1 - Sicherungsschaltungen für aus nicht-flüchtigen Speichem bestehenden Anordnungen - Google Patents

Sicherungsschaltungen für aus nicht-flüchtigen Speichem bestehenden Anordnungen

Info

Publication number
DE69314013D1
DE69314013D1 DE69314013T DE69314013T DE69314013D1 DE 69314013 D1 DE69314013 D1 DE 69314013D1 DE 69314013 T DE69314013 T DE 69314013T DE 69314013 T DE69314013 T DE 69314013T DE 69314013 D1 DE69314013 D1 DE 69314013D1
Authority
DE
Germany
Prior art keywords
volatile memories
safety circuits
arrangements consisting
arrangements
circuits
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69314013T
Other languages
English (en)
Other versions
DE69314013T2 (de
Inventor
Saverio Pezzini
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics SRL
Original Assignee
STMicroelectronics SRL
SGS Thomson Microelectronics SRL
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by STMicroelectronics SRL, SGS Thomson Microelectronics SRL filed Critical STMicroelectronics SRL
Publication of DE69314013D1 publication Critical patent/DE69314013D1/de
Application granted granted Critical
Publication of DE69314013T2 publication Critical patent/DE69314013T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/14—Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
    • G11C5/147—Voltage reference generators, voltage or current regulators; Internally lowered supply levels; Compensation for voltage drops

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Read Only Memory (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Electronic Switches (AREA)
DE69314013T 1993-06-28 1993-06-28 Sicherungsschaltungen für aus nicht-flüchtigen Speichem bestehenden Anordnungen Expired - Fee Related DE69314013T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP93830279A EP0631284B1 (de) 1993-06-28 1993-06-28 Sicherungsschaltungen für aus nicht-flüchtigen Speichem bestehenden Anordnungen

Publications (2)

Publication Number Publication Date
DE69314013D1 true DE69314013D1 (de) 1997-10-23
DE69314013T2 DE69314013T2 (de) 1998-02-19

Family

ID=8215191

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69314013T Expired - Fee Related DE69314013T2 (de) 1993-06-28 1993-06-28 Sicherungsschaltungen für aus nicht-flüchtigen Speichem bestehenden Anordnungen

Country Status (4)

Country Link
US (1) US5579196A (de)
EP (1) EP0631284B1 (de)
JP (1) JPH07141894A (de)
DE (1) DE69314013T2 (de)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
SE503646C2 (sv) * 1994-11-10 1996-07-22 Ericsson Telefon Ab L M Automatisk omkopplingsanordning
DE19602456C1 (de) * 1996-01-24 1997-04-10 Texas Instruments Deutschland BiCMOS/CMOS-Schaltung
US6421213B1 (en) * 2000-03-17 2002-07-16 Advanced Technology Materials, Inc. Method and apparatus for detecting a tamper condition and isolating a circuit therefrom
CA2360117A1 (en) * 2001-10-24 2003-04-24 Catena Networks Canada Inc. The application of pots ringing signals without interfering with dsl signals
JP4569541B2 (ja) * 2006-08-11 2010-10-27 Ｔｄｋ株式会社 電源回路、フラッシュメモリシステム及び電源供給方法
JP5348541B2 (ja) * 2009-05-20 2013-11-20 ルネサスエレクトロニクス株式会社 半導体装置
US8630139B2 (en) * 2011-11-30 2014-01-14 International Business Machines Corporation Dual power supply memory array having a control circuit that dynamically selects a lower of two supply voltages for bitline pre-charge operations and an associated method

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3044689C2 (de) * 1980-11-27 1982-08-26 Deutsche Itt Industries Gmbh, 7800 Freiburg Integrierte Schaltung mit nichtflüchtig programmierbaren Halbleiterspeichern
US4975878A (en) * 1988-01-28 1990-12-04 National Semiconductor Programmable memory data protection scheme
US4975883A (en) * 1990-03-29 1990-12-04 Intel Corporation Method and apparatus for preventing the erasure and programming of a nonvolatile memory
JP2778199B2 (ja) * 1990-04-27 1998-07-23 日本電気株式会社 内部降圧回路
US5199032A (en) * 1990-09-04 1993-03-30 Motorola, Inc. Microcontroller having an EPROM with a low voltage program inhibit circuit
US5371709A (en) * 1993-04-01 1994-12-06 Microchip Technology Incorporated Power management system for serial EEPROM device

Also Published As

Publication number Publication date
US5579196A (en) 1996-11-26
JPH07141894A (ja) 1995-06-02
EP0631284A1 (de) 1994-12-28
EP0631284B1 (de) 1997-09-17
DE69314013T2 (de) 1998-02-19

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee