DE69229842D1 - Halbleiterspeicheranordnung mit einem Dünnschichttransistor und Herstellungsmethode für selben - Google Patents

Halbleiterspeicheranordnung mit einem Dünnschichttransistor und Herstellungsmethode für selben

Info

Publication number
DE69229842D1
DE69229842D1 DE69229842T DE69229842T DE69229842D1 DE 69229842 D1 DE69229842 D1 DE 69229842D1 DE 69229842 T DE69229842 T DE 69229842T DE 69229842 T DE69229842 T DE 69229842T DE 69229842 D1 DE69229842 D1 DE 69229842D1
Authority
DE
Germany
Prior art keywords
manufacturing
thin film
memory device
same
film transistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69229842T
Other languages
English (en)
Other versions
DE69229842T2 (de
Inventor
Taiji Ema
Kazuo Itabashi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP3085916A external-priority patent/JPH04299568A/ja
Priority claimed from JP3145940A external-priority patent/JP2539304B2/ja
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Publication of DE69229842D1 publication Critical patent/DE69229842D1/de
Application granted granted Critical
Publication of DE69229842T2 publication Critical patent/DE69229842T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B10/00—Static random access memory [SRAM] devices
    • H10B10/12—Static random access memory [SRAM] devices comprising a MOSFET load element
    • H10B10/125—Static random access memory [SRAM] devices comprising a MOSFET load element the MOSFET being a thin film transistor [TFT]
DE69229842T 1991-03-27 1992-03-25 Halbleiterspeicheranordnung mit einem Dünnschichttransistor und Herstellungsmethode für selben Expired - Fee Related DE69229842T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP3085916A JPH04299568A (ja) 1991-03-27 1991-03-27 半導体記憶装置及びその製造方法
JP3145940A JP2539304B2 (ja) 1991-06-18 1991-06-18 半導体記憶装置及びその製造方法

Publications (2)

Publication Number Publication Date
DE69229842D1 true DE69229842D1 (de) 1999-09-30
DE69229842T2 DE69229842T2 (de) 2000-04-20

Family

ID=26426920

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69229842T Expired - Fee Related DE69229842T2 (de) 1991-03-27 1992-03-25 Halbleiterspeicheranordnung mit einem Dünnschichttransistor und Herstellungsmethode für selben

Country Status (4)

Country Link
US (1) US5594267A (de)
EP (1) EP0510370B1 (de)
KR (1) KR960011940B1 (de)
DE (1) DE69229842T2 (de)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04250663A (ja) * 1991-01-25 1992-09-07 Sony Corp 半導体メモリ装置
DE19534784C1 (de) * 1995-09-19 1997-04-24 Siemens Ag Halbleiter-Schaltungselement und Verfahren zu seiner Herstellung
US5973369A (en) * 1997-03-11 1999-10-26 Nec Corporation SRAM having P-channel TFT as load element with less series-connected high resistance
KR100214841B1 (ko) * 1996-03-29 1999-08-02 김주용 반도체 소자 및 그의 제조방법
US6004881A (en) * 1997-04-24 1999-12-21 The United States Of America As Represented By The Secretary Of The Air Force Digital wet etching of semiconductor materials
US7372720B1 (en) 2005-02-16 2008-05-13 Altera Corporation Methods and apparatus for decreasing soft errors and cell leakage in integrated circuit structures

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60178646A (ja) * 1984-02-24 1985-09-12 Nec Corp 静電シ−ルドを有する半導体集積回路
JPS60224246A (ja) * 1984-04-20 1985-11-08 Fujitsu Ltd 半導体装置
US4679171A (en) * 1985-02-07 1987-07-07 Visic, Inc. MOS/CMOS memory cell
US4764801A (en) * 1985-10-08 1988-08-16 Motorola Inc. Poly-sidewall contact transistors
JPS62169472A (ja) * 1986-01-22 1987-07-25 Hitachi Ltd 半導体集積回路装置
JPH07112014B2 (ja) * 1986-07-09 1995-11-29 株式会社日立製作所 半導体記憶装置
JP2544396B2 (ja) * 1987-08-25 1996-10-16 株式会社日立製作所 半導体集積回路装置の製造方法
JP2547800B2 (ja) * 1987-11-30 1996-10-23 株式会社日立製作所 半導体集積回路装置及びその製造方法
JP2544417B2 (ja) * 1987-11-30 1996-10-16 株式会社日立製作所 半導体集積回路装置
WO1989011162A1 (en) * 1988-05-07 1989-11-16 Seiko Epson Corporation Semiconductor device and semiconductor memory device

Also Published As

Publication number Publication date
EP0510370B1 (de) 1999-08-25
US5594267A (en) 1997-01-14
KR960011940B1 (en) 1996-09-04
DE69229842T2 (de) 2000-04-20
EP0510370A1 (de) 1992-10-28

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee