DE69226887D1 - Halbleiteranordnung und Verfahren zum Herstellen einer derartigen Halbleiteranordnung - Google Patents

Halbleiteranordnung und Verfahren zum Herstellen einer derartigen Halbleiteranordnung

Info

Publication number
DE69226887D1
DE69226887D1 DE69226887T DE69226887T DE69226887D1 DE 69226887 D1 DE69226887 D1 DE 69226887D1 DE 69226887 T DE69226887 T DE 69226887T DE 69226887 T DE69226887 T DE 69226887T DE 69226887 D1 DE69226887 D1 DE 69226887D1
Authority
DE
Germany
Prior art keywords
semiconductor arrangement
producing
semiconductor
arrangement
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69226887T
Other languages
English (en)
Other versions
DE69226887T2 (de
Inventor
Hermanus Leonardus Peek
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Koninklijke Philips NV
Original Assignee
Koninklijke Philips Electronics NV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Koninklijke Philips Electronics NV filed Critical Koninklijke Philips Electronics NV
Publication of DE69226887D1 publication Critical patent/DE69226887D1/de
Application granted granted Critical
Publication of DE69226887T2 publication Critical patent/DE69226887T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
    • H01L21/76807—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics for dual damascene structures
    • H01L21/7681—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics for dual damascene structures involving one or more buried masks
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H01L27/148—Charge coupled imagers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H01L27/148—Charge coupled imagers
    • H01L27/14806—Structural or functional details thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H01L27/148—Charge coupled imagers
    • H01L27/14831—Area CCD imagers
    • H01L27/1485—Frame transfer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66946—Charge transfer devices
    • H01L29/66954—Charge transfer devices with an insulated gate
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/97—Specified etch stop material

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Solid State Image Pick-Up Elements (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Drying Of Semiconductors (AREA)
DE69226887T 1991-01-21 1992-01-14 Halbleiteranordnung und Verfahren zum Herstellen einer derartigen Halbleiteranordnung Expired - Fee Related DE69226887T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
NL9100094A NL9100094A (nl) 1991-01-21 1991-01-21 Halfgeleiderinrichting en werkwijze ter vervaardiging van een dergelijke halfgeleiderinrichting.

Publications (2)

Publication Number Publication Date
DE69226887D1 true DE69226887D1 (de) 1998-10-15
DE69226887T2 DE69226887T2 (de) 1999-04-08

Family

ID=19858750

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69226887T Expired - Fee Related DE69226887T2 (de) 1991-01-21 1992-01-14 Halbleiteranordnung und Verfahren zum Herstellen einer derartigen Halbleiteranordnung

Country Status (6)

Country Link
US (2) US5396092A (de)
EP (1) EP0496443B1 (de)
JP (1) JP3048459B2 (de)
KR (1) KR100273070B1 (de)
DE (1) DE69226887T2 (de)
NL (1) NL9100094A (de)

Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL9100094A (nl) * 1991-01-21 1992-08-17 Koninkl Philips Electronics Nv Halfgeleiderinrichting en werkwijze ter vervaardiging van een dergelijke halfgeleiderinrichting.
DE69428394T2 (de) * 1993-05-21 2002-07-04 Koninklijke Philips Electronics N.V., Eindhoven Ladungsgekoppelte Bildaufnahmeanordnung
EP0625800B1 (de) * 1993-05-21 2001-09-26 Koninklijke Philips Electronics N.V. Ladungsgekoppelte Bildaufnahmeanordnung
US5382545A (en) * 1993-11-29 1995-01-17 United Microelectronics Corporation Interconnection process with self-aligned via plug
US5635421A (en) * 1995-06-15 1997-06-03 Taiwan Semiconductor Manufacturing Company Method of making a precision capacitor array
US5719075A (en) * 1995-07-31 1998-02-17 Eastman Kodak Company Method of making a planar charge coupled device with edge aligned implants and electrodes connected with overlying metal
JPH09153545A (ja) * 1995-09-29 1997-06-10 Toshiba Corp 半導体装置及びその製造方法
US6008121A (en) * 1996-03-19 1999-12-28 Siemens Aktiengesellschaft Etching high aspect contact holes in solid state devices
JPH09270461A (ja) * 1996-03-29 1997-10-14 Mitsubishi Electric Corp 半導体装置
US5652173A (en) * 1996-05-09 1997-07-29 Philips Electronics North America Corporation Monolithic microwave circuit with thick conductors
KR100519834B1 (ko) * 1997-05-29 2005-10-06 코닌클리즈케 필립스 일렉트로닉스 엔.브이. 전자 디바이스의 제조 방법
US5989784A (en) * 1998-04-06 1999-11-23 Taiwan Semiconductor Manufacturing Company, Ltd. Etch recipe for embedded DRAM passivation with etch stopping layer scheme
EP1374301A2 (de) * 2001-03-21 2004-01-02 Koninklijke Philips Electronics N.V. Herstellung eines halbleiterbauelementes mit durch wolframstopfen verbundenen leiterebenen
DE10320166B4 (de) * 2002-05-16 2007-06-06 Dalsa Corp., Waterloo Pixelentwurf für CCD-Bildsensoren
US6562711B1 (en) * 2002-06-28 2003-05-13 Intel Corporation Method of reducing capacitance of interconnect
US8166438B2 (en) * 2009-01-28 2012-04-24 Oracle America, Inc. Low RC local clock distribution
US8245781B2 (en) * 2009-12-11 2012-08-21 Schlumberger Technology Corporation Formation fluid sampling

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4163239A (en) * 1971-12-30 1979-07-31 Texas Instruments Incorporated Second level phase lines for CCD line imager
US4291328A (en) * 1979-06-15 1981-09-22 Texas Instruments Incorporated Interlevel insulator for integrated circuit with implanted resistor element in second-level polycrystalline silicon
US4488166A (en) * 1980-12-09 1984-12-11 Fairchild Camera & Instrument Corp. Multilayer metal silicide interconnections for integrated circuits
JPS5966165A (ja) * 1982-10-08 1984-04-14 Hitachi Ltd 電極配線およびその製造方法
JPS601846A (ja) * 1983-06-18 1985-01-08 Toshiba Corp 多層配線構造の半導体装置とその製造方法
NL8501339A (nl) * 1985-05-10 1986-12-01 Philips Nv Halfgeleiderinrichting en werkwijze ter vervaardiging daarvan.
JPS61280638A (ja) * 1985-06-06 1986-12-11 Toshiba Corp 半導体装置の製造方法
US4808552A (en) * 1985-09-11 1989-02-28 Texas Instruments Incorporated Process for making vertically-oriented interconnections for VLSI devices
US4789648A (en) * 1985-10-28 1988-12-06 International Business Machines Corporation Method for producing coplanar multi-level metal/insulator films on a substrate and for forming patterned conductive lines simultaneously with stud vias
EP0272051B1 (de) * 1986-12-17 1992-09-16 Advanced Micro Devices, Inc. Aneinandergefügte Kontaktstruktur mit vermindertem Flächenbedarf
JPH02134992A (ja) * 1988-11-15 1990-05-23 Matsushita Electron Corp 固体撮像素子
NL9100094A (nl) * 1991-01-21 1992-08-17 Koninkl Philips Electronics Nv Halfgeleiderinrichting en werkwijze ter vervaardiging van een dergelijke halfgeleiderinrichting.

Also Published As

Publication number Publication date
EP0496443A1 (de) 1992-07-29
KR920015623A (ko) 1992-08-27
EP0496443B1 (de) 1998-09-09
JP3048459B2 (ja) 2000-06-05
US5536678A (en) 1996-07-16
NL9100094A (nl) 1992-08-17
JPH04302472A (ja) 1992-10-26
KR100273070B1 (ko) 2000-12-01
DE69226887T2 (de) 1999-04-08
US5396092A (en) 1995-03-07

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee