DE69130946T2 - Verfahren zur ausschliesslichen steuerung für einen gemeinsamen speicher - Google Patents

Verfahren zur ausschliesslichen steuerung für einen gemeinsamen speicher

Info

Publication number
DE69130946T2
DE69130946T2 DE69130946T DE69130946T DE69130946T2 DE 69130946 T2 DE69130946 T2 DE 69130946T2 DE 69130946 T DE69130946 T DE 69130946T DE 69130946 T DE69130946 T DE 69130946T DE 69130946 T2 DE69130946 T2 DE 69130946T2
Authority
DE
Germany
Prior art keywords
exclusive control
common storage
common
storage
exclusive
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69130946T
Other languages
English (en)
Other versions
DE69130946D1 (de
Inventor
Toshio Ogawa
Akira Kabemoto
Masashi Shirotani
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Application granted granted Critical
Publication of DE69130946D1 publication Critical patent/DE69130946D1/de
Publication of DE69130946T2 publication Critical patent/DE69130946T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/163—Interprocessor communication
    • G06F15/17—Interprocessor communication using an input/output type connection, e.g. channel, I/O port
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/163—Interprocessor communication
    • G06F15/167—Interprocessor communication using a common memory, e.g. mailbox
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/52—Program synchronisation; Mutual exclusion, e.g. by means of semaphores
    • G06F9/526—Mutual exclusion algorithms
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2209/00—Indexing scheme relating to G06F9/00
    • G06F2209/52—Indexing scheme relating to G06F9/52
    • G06F2209/521—Atomic

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Multi Processors (AREA)
DE69130946T 1990-09-18 1991-09-18 Verfahren zur ausschliesslichen steuerung für einen gemeinsamen speicher Expired - Fee Related DE69130946T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP24820690 1990-09-18
PCT/JP1991/001239 WO1992005490A1 (en) 1990-09-18 1991-09-18 Exclusive control method for shared memory

Publications (2)

Publication Number Publication Date
DE69130946D1 DE69130946D1 (de) 1999-04-08
DE69130946T2 true DE69130946T2 (de) 1999-07-08

Family

ID=17174773

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69130946T Expired - Fee Related DE69130946T2 (de) 1990-09-18 1991-09-18 Verfahren zur ausschliesslichen steuerung für einen gemeinsamen speicher

Country Status (4)

Country Link
US (1) US5377324A (de)
EP (1) EP0507951B1 (de)
DE (1) DE69130946T2 (de)
WO (1) WO1992005490A1 (de)

Families Citing this family (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2936036B2 (ja) * 1992-10-27 1999-08-23 富士通株式会社 メモリアクセス装置
FI94189C (fi) * 1993-10-13 1995-07-25 Nokia Telecommunications Oy Menetelmä rinnakkaisliitännän toteuttamiseksi sekä rinnakkaisliitäntä
US5717950A (en) 1994-01-11 1998-02-10 Hitachi, Ltd. Input/output device information management system for multi-computer system
TW357295B (en) * 1994-02-08 1999-05-01 United Microelectronics Corp Microprocessor's data writing, reading operations
JP3385091B2 (ja) * 1994-05-13 2003-03-10 三菱電機株式会社 計算機間の排他制御装置
US5848258A (en) * 1994-06-30 1998-12-08 Digital Equipment Corporation Memory bank addressing scheme
US6256710B1 (en) 1995-04-28 2001-07-03 Apple Computer, Inc. Cache management during cache inhibited transactions for increasing cache efficiency
US5901295A (en) * 1995-04-28 1999-05-04 Apple Computer, Inc. Address and data bus arbiter for pipelined transactions on a split bus
US5815676A (en) * 1995-04-28 1998-09-29 Apple Computer, Inc. Address bus arbiter for pipelined transactions on a split bus
US5708783A (en) * 1995-04-28 1998-01-13 Apple Computer, Inc. Data bus arbiter for pipelined transactions on a split bus
US5812815A (en) * 1995-04-28 1998-09-22 Apple Computer, Inc. Address tenure control for cache management wherein bus master addresses are internally latched in a cache controller
DE19703963A1 (de) * 1997-02-03 1998-08-06 Siemens Ag Verfahren und Vorrichtung zum Austauschen von Daten zwischen dezentral anordbaren elektronischen Baugruppen
US5900018A (en) * 1997-06-24 1999-05-04 Sun Microsystems, Inc. Processor-implemented method of controlling data access to shared resource via exclusive access control write-cache
US6112282A (en) * 1997-06-24 2000-08-29 Sun Microsystems, Inc. Apparatus for atomic locking-accessing-unlocking of a shared resource
US20030229738A1 (en) * 2002-06-05 2003-12-11 Dactron Controller interface
US7624237B2 (en) * 2006-05-03 2009-11-24 International Business Machines Corporation Compare, swap and store facility with no external serialization
US20120017070A1 (en) * 2009-03-25 2012-01-19 Satoshi Hieda Compile system, compile method, and storage medium storing compile program
CN113468096A (zh) * 2017-06-26 2021-10-01 上海寒武纪信息科技有限公司 数据共享系统及其数据共享方法

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55134462A (en) * 1979-04-06 1980-10-20 Nec Corp Memory control unit
JPS5725053A (en) * 1980-07-22 1982-02-09 Nec Corp Memory device
JPS57211628A (en) * 1981-06-22 1982-12-25 Hitachi Ltd Controller for shared input and output loop bus of multicomputer system
JPS5985547A (ja) * 1982-11-09 1984-05-17 Nec Corp マルチタスクプロセツサにおける排他的資源の管理方式
JPS59116866A (ja) * 1982-12-23 1984-07-05 Toshiba Corp 計算機システムの記憶装置
JPS61165170A (ja) * 1984-12-19 1986-07-25 Fujitsu Ltd バス制御方式
JPS6329296A (ja) * 1986-07-23 1988-02-06 株式会社東芝 高速増殖炉用しやへい体
US5201039A (en) * 1987-09-30 1993-04-06 Mitsubishi Denki Kabushiki Kaisha Multiple address-space data processor with addressable register and context switching
CA2000245C (en) * 1988-10-08 1996-07-16 Hideo Hayashi Multiprocessor system using communication register having processor-associated storage locations
US5175829A (en) * 1988-10-25 1992-12-29 Hewlett-Packard Company Method and apparatus for bus lock during atomic computer operations

Also Published As

Publication number Publication date
EP0507951A1 (de) 1992-10-14
EP0507951B1 (de) 1999-03-03
WO1992005490A1 (en) 1992-04-02
DE69130946D1 (de) 1999-04-08
EP0507951A4 (de) 1995-04-19
US5377324A (en) 1994-12-27

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee