DE69126637D1 - Verfahren zum Herstellen von Polysilizium mit niedriger Fehlerdichte - Google Patents
Verfahren zum Herstellen von Polysilizium mit niedriger FehlerdichteInfo
- Publication number
- DE69126637D1 DE69126637D1 DE69126637T DE69126637T DE69126637D1 DE 69126637 D1 DE69126637 D1 DE 69126637D1 DE 69126637 T DE69126637 T DE 69126637T DE 69126637 T DE69126637 T DE 69126637T DE 69126637 D1 DE69126637 D1 DE 69126637D1
- Authority
- DE
- Germany
- Prior art keywords
- polysilicon
- production
- defect density
- low defect
- low
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 230000007547 defect Effects 0.000 title 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 title 1
- 229920005591 polysilicon Polymers 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31105—Etching inorganic layers
- H01L21/31111—Etching inorganic layers by chemical means
- H01L21/31116—Etching inorganic layers by chemical means by dry-etching
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/0237—Materials
- H01L21/02373—Group 14 semiconducting materials
- H01L21/02381—Silicon, silicon germanium, germanium
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02524—Group 14 semiconducting materials
- H01L21/02532—Silicon, silicon germanium, germanium
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02612—Formation types
- H01L21/02617—Deposition types
- H01L21/0262—Reduction or decomposition of gaseous compounds, e.g. CVD
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02656—Special treatments
- H01L21/02658—Pretreatments
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
- H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
- H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
- H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
- H01L21/28525—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table the conductive layers comprising semiconducting material
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/321—After treatment
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/913—Diverse treatments performed in unitary chamber
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Materials Engineering (AREA)
- Chemical Kinetics & Catalysis (AREA)
- General Chemical & Material Sciences (AREA)
- Inorganic Chemistry (AREA)
- Cleaning Or Drying Semiconductors (AREA)
- Drying Of Semiconductors (AREA)
- Weting (AREA)
- Electrodes Of Semiconductors (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US07/508,210 US4981811A (en) | 1990-04-12 | 1990-04-12 | Process for fabricating low defect polysilicon |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69126637D1 true DE69126637D1 (de) | 1997-07-31 |
DE69126637T2 DE69126637T2 (de) | 1998-01-15 |
Family
ID=24021813
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69126637T Expired - Fee Related DE69126637T2 (de) | 1990-04-12 | 1991-04-03 | Verfahren zum Herstellen von Polysilizium mit niedriger Fehlerdichte |
Country Status (4)
Country | Link |
---|---|
US (1) | US4981811A (de) |
EP (1) | EP0454308B1 (de) |
JP (1) | JP2520990B2 (de) |
DE (1) | DE69126637T2 (de) |
Families Citing this family (21)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR930009549B1 (ko) * | 1990-11-28 | 1993-10-06 | 현대전자산업 주식회사 | 고저항용 다결정 실리콘의 저항치 유지방법 |
JPH0697140A (ja) * | 1992-09-14 | 1994-04-08 | Toshiba Corp | 半導体基板処理方法 |
US5346581A (en) * | 1993-04-01 | 1994-09-13 | At&T Bell Laboratories | Method of making a compound semiconductor device |
US5413671A (en) * | 1993-08-09 | 1995-05-09 | Advanced Micro Devices, Inc. | Apparatus and method for removing deposits from an APCVD system |
JPH10340857A (ja) | 1997-06-10 | 1998-12-22 | Mitsubishi Electric Corp | 半導体装置の製造方法及び半導体製造装置 |
TW449832B (en) * | 1999-01-04 | 2001-08-11 | United Microelectronics Corp | Removing method of polysilicon defect |
JP4221859B2 (ja) * | 1999-02-12 | 2009-02-12 | 株式会社デンソー | 半導体装置の製造方法 |
US6606247B2 (en) * | 2001-05-31 | 2003-08-12 | Alien Technology Corporation | Multi-feature-size electronic structures |
US6998305B2 (en) * | 2003-01-24 | 2006-02-14 | Asm America, Inc. | Enhanced selectivity for epitaxial deposition |
US20050048742A1 (en) * | 2003-08-26 | 2005-03-03 | Tokyo Electron Limited | Multiple grow-etch cyclic surface treatment for substrate preparation |
US8278176B2 (en) | 2006-06-07 | 2012-10-02 | Asm America, Inc. | Selective epitaxial formation of semiconductor films |
US9953910B2 (en) * | 2007-06-21 | 2018-04-24 | General Electric Company | Demountable interconnect structure |
US9610758B2 (en) * | 2007-06-21 | 2017-04-04 | General Electric Company | Method of making demountable interconnect structure |
US20080318413A1 (en) * | 2007-06-21 | 2008-12-25 | General Electric Company | Method for making an interconnect structure and interconnect component recovery process |
US20080318055A1 (en) * | 2007-06-21 | 2008-12-25 | General Electric Company | Recoverable electronic component |
US20080313894A1 (en) * | 2007-06-21 | 2008-12-25 | General Electric Company | Method for making an interconnect structure and low-temperature interconnect component recovery process |
US20080318054A1 (en) * | 2007-06-21 | 2008-12-25 | General Electric Company | Low-temperature recoverable electronic component |
US20090028491A1 (en) | 2007-07-26 | 2009-01-29 | General Electric Company | Interconnect structure |
US7759199B2 (en) * | 2007-09-19 | 2010-07-20 | Asm America, Inc. | Stressor for engineered strain on channel |
US8367528B2 (en) | 2009-11-17 | 2013-02-05 | Asm America, Inc. | Cyclical epitaxial deposition and etch |
US8809170B2 (en) | 2011-05-19 | 2014-08-19 | Asm America Inc. | High throughput cyclical epitaxial deposition and etch process |
Family Cites Families (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4056642A (en) * | 1976-05-14 | 1977-11-01 | Data General Corporation | Method of fabricating metal-semiconductor interfaces |
US4243865A (en) * | 1976-05-14 | 1981-01-06 | Data General Corporation | Process for treating material in plasma environment |
US4361461A (en) * | 1981-03-13 | 1982-11-30 | Bell Telephone Laboratories, Incorporated | Hydrogen etching of semiconductors and oxides |
US4549926A (en) * | 1982-01-12 | 1985-10-29 | Rca Corporation | Method for growing monocrystalline silicon on a mask layer |
US4497683A (en) * | 1982-05-03 | 1985-02-05 | At&T Bell Laboratories | Process for producing dielectrically isolated silicon devices |
US4546535A (en) * | 1983-12-12 | 1985-10-15 | International Business Machines Corporation | Method of making submicron FET structure |
US4578142A (en) * | 1984-05-10 | 1986-03-25 | Rca Corporation | Method for growing monocrystalline silicon through mask layer |
US4579609A (en) * | 1984-06-08 | 1986-04-01 | Massachusetts Institute Of Technology | Growth of epitaxial films by chemical vapor deposition utilizing a surface cleaning step immediately before deposition |
US4778776A (en) * | 1985-06-27 | 1988-10-18 | General Electric Company | Passivation with a low oxygen interface |
US4749440A (en) * | 1985-08-28 | 1988-06-07 | Fsi Corporation | Gaseous process and apparatus for removing films from substrates |
ATE113757T1 (de) * | 1985-08-28 | 1994-11-15 | Fsi Int Inc | Verfahren und vorrichtung zum entfernen von schichten von substraten. |
JPH01286317A (ja) * | 1988-05-12 | 1989-11-17 | Mitsubishi Electric Corp | 絶縁膜を除去する半導体製造装置 |
JPH0282575A (ja) * | 1988-09-19 | 1990-03-23 | Toshiba Corp | 半導体装置およびその製造方法 |
-
1990
- 1990-04-12 US US07/508,210 patent/US4981811A/en not_active Expired - Lifetime
-
1991
- 1991-04-03 DE DE69126637T patent/DE69126637T2/de not_active Expired - Fee Related
- 1991-04-03 EP EP91302927A patent/EP0454308B1/de not_active Expired - Lifetime
- 1991-04-11 JP JP3105144A patent/JP2520990B2/ja not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
DE69126637T2 (de) | 1998-01-15 |
EP0454308A3 (en) | 1992-10-28 |
EP0454308A2 (de) | 1991-10-30 |
EP0454308B1 (de) | 1997-06-25 |
JP2520990B2 (ja) | 1996-07-31 |
JPH04226017A (ja) | 1992-08-14 |
US4981811A (en) | 1991-01-01 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |