DE69120142D1 - Zusammengesetzte elektrische Bauteile - Google Patents
Zusammengesetzte elektrische BauteileInfo
- Publication number
- DE69120142D1 DE69120142D1 DE69120142T DE69120142T DE69120142D1 DE 69120142 D1 DE69120142 D1 DE 69120142D1 DE 69120142 T DE69120142 T DE 69120142T DE 69120142 T DE69120142 T DE 69120142T DE 69120142 D1 DE69120142 D1 DE 69120142D1
- Authority
- DE
- Germany
- Prior art keywords
- circuit
- output
- test data
- electrical components
- circuits
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/3181—Functional testing
- G01R31/3185—Reconfiguring for testing, e.g. LSSD, partitioning
- G01R31/318533—Reconfiguring for testing, e.g. LSSD, partitioning using scanning techniques, e.g. LSSD, Boundary Scan, JTAG
- G01R31/318536—Scan chain arrangements, e.g. connections, test bus, analog signals
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/3167—Testing of combined analog and digital circuits
Landscapes
- Engineering & Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Tests Of Electronic Circuits (AREA)
- Insulated Conductors (AREA)
- Design And Manufacture Of Integrated Circuits (AREA)
- Non-Reversible Transmitting Devices (AREA)
- Hard Magnetic Materials (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB909008544A GB9008544D0 (en) | 1990-04-17 | 1990-04-17 | Electrical assemblies |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69120142D1 true DE69120142D1 (de) | 1996-07-18 |
DE69120142T2 DE69120142T2 (de) | 1996-10-10 |
Family
ID=10674486
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69120142T Expired - Fee Related DE69120142T2 (de) | 1990-04-17 | 1991-03-26 | Zusammengesetzte elektrische Bauteile |
Country Status (6)
Country | Link |
---|---|
US (1) | US5134638A (de) |
EP (1) | EP0453106B1 (de) |
JP (2) | JPH0792229A (de) |
AT (1) | ATE139355T1 (de) |
DE (1) | DE69120142T2 (de) |
GB (2) | GB9008544D0 (de) |
Families Citing this family (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5761214A (en) * | 1992-10-16 | 1998-06-02 | International Business Machines Corporation | Method for testing integrated circuit devices |
US5477545A (en) * | 1993-02-09 | 1995-12-19 | Lsi Logic Corporation | Method and apparatus for testing of core-cell based integrated circuits |
US5951703A (en) * | 1993-06-28 | 1999-09-14 | Tandem Computers Incorporated | System and method for performing improved pseudo-random testing of systems having multi driver buses |
US5600257A (en) * | 1995-08-09 | 1997-02-04 | International Business Machines Corporation | Semiconductor wafer test and burn-in |
US5644609A (en) * | 1996-07-31 | 1997-07-01 | Hewlett-Packard Company | Apparatus and method for reading and writing remote registers on an integrated circuit chip using a minimum of interconnects |
DE19744818B4 (de) * | 1997-04-11 | 2006-06-01 | National Semiconductor Corp.(N.D.Ges.D.Staates Delaware), Santa Clara | Verfahren zum Prüfen einer Mischsignalschaltung und Mischsignalschaltung |
US5793778A (en) * | 1997-04-11 | 1998-08-11 | National Semiconductor Corporation | Method and apparatus for testing analog and digital circuitry within a larger circuit |
KR100582807B1 (ko) * | 1998-04-23 | 2006-05-24 | 코닌클리즈케 필립스 일렉트로닉스 엔.브이. | 아날로그 회로 및 디지털 회로를 구비하는 검사 가능한 집적 회로 |
WO2017164872A1 (en) * | 2016-03-24 | 2017-09-28 | Intel Corporation | System-on-chip devices and methods for testing system-on-chip devices |
Family Cites Families (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE1524231A1 (de) * | 1966-03-17 | 1970-04-30 | Telefunken Patent | Rechenmaschine mit einem Verzoegerungs-Umlaufspeicher |
US3849634A (en) * | 1969-06-21 | 1974-11-19 | Olivetti & Co Spa | Electronic computer |
DE2131272B1 (de) * | 1971-06-24 | 1972-05-25 | Kienzle Apparate Gmbh | Vorrichtung an elektronischen Taxametern |
US3973108A (en) * | 1974-01-21 | 1976-08-03 | Coulter Electronics, Inc. | Pulse storing and retrieval circuit |
US3974457A (en) * | 1975-09-19 | 1976-08-10 | The United States Of America As Represented By The Secretary Of The Navy | Time and frequency control unit |
US4377757A (en) * | 1980-02-11 | 1983-03-22 | Siemens Aktiengesellschaft | Logic module for integrated digital circuits |
US4433426A (en) * | 1980-06-16 | 1984-02-21 | Veb Kombinat Polygraph "Werner Lamberz" | Control system for printing machines |
GB8511187D0 (en) * | 1985-05-02 | 1985-06-12 | Int Computers Ltd | Testing digital integrated circuits |
US4639557A (en) * | 1985-09-27 | 1987-01-27 | Communications Technology Corporation | Remote testing system for electrical circuits |
FR2595474B1 (fr) * | 1986-03-04 | 1988-06-24 | Texas Instruments France | Dispositif de controle et de verification du fonctionnement de blocs internes a un circuit integre |
JPH06105285B2 (ja) * | 1986-08-22 | 1994-12-21 | 三菱電機株式会社 | 半導体集積回路装置 |
GB2200465B (en) * | 1987-01-16 | 1991-10-02 | Teradyne Inc | Automatic test equipment |
US4829236A (en) * | 1987-10-30 | 1989-05-09 | Teradyne, Inc. | Digital-to-analog calibration system |
JP2594130B2 (ja) * | 1988-09-02 | 1997-03-26 | 三菱電機株式会社 | 半導体回路 |
-
1990
- 1990-04-17 GB GB909008544A patent/GB9008544D0/en active Pending
-
1991
- 1991-03-26 AT AT91302622T patent/ATE139355T1/de not_active IP Right Cessation
- 1991-03-26 DE DE69120142T patent/DE69120142T2/de not_active Expired - Fee Related
- 1991-03-26 EP EP91302622A patent/EP0453106B1/de not_active Expired - Lifetime
- 1991-03-27 GB GB9106479A patent/GB2245105B/en not_active Expired - Fee Related
- 1991-04-01 US US07/678,458 patent/US5134638A/en not_active Expired - Lifetime
- 1991-04-12 JP JP3106446A patent/JPH0792229A/ja active Pending
-
2000
- 2000-11-15 JP JP2000008146U patent/JP2001000042U/ja active Pending
Also Published As
Publication number | Publication date |
---|---|
GB9106479D0 (en) | 1991-05-15 |
DE69120142T2 (de) | 1996-10-10 |
JP2001000042U (ja) | 2001-12-07 |
JPH0792229A (ja) | 1995-04-07 |
GB9008544D0 (en) | 1990-06-13 |
US5134638A (en) | 1992-07-28 |
GB2245105B (en) | 1994-01-05 |
EP0453106A1 (de) | 1991-10-23 |
EP0453106B1 (de) | 1996-06-12 |
ATE139355T1 (de) | 1996-06-15 |
GB2245105A (en) | 1991-12-18 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8327 | Change in the person/name/address of the patent owner |
Owner name: SMITHS GROUP PLC, LONDON, GB |
|
8339 | Ceased/non-payment of the annual fee |