DE69115488D1 - Neuronale prozessoren für realwerteingangbearbeitung - Google Patents

Neuronale prozessoren für realwerteingangbearbeitung

Info

Publication number
DE69115488D1
DE69115488D1 DE69115488T DE69115488T DE69115488D1 DE 69115488 D1 DE69115488 D1 DE 69115488D1 DE 69115488 T DE69115488 T DE 69115488T DE 69115488 T DE69115488 T DE 69115488T DE 69115488 D1 DE69115488 D1 DE 69115488D1
Authority
DE
Germany
Prior art keywords
pct
comparator
location
values
neuronal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69115488T
Other languages
English (en)
Other versions
DE69115488T2 (de
Inventor
John Taylor
Denise Gorse
Trevor Clarkson
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
University College London
Kings College London
Original Assignee
University College London
Kings College London
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by University College London, Kings College London filed Critical University College London
Publication of DE69115488D1 publication Critical patent/DE69115488D1/de
Application granted granted Critical
Publication of DE69115488T2 publication Critical patent/DE69115488T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06NCOMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N3/00Computing arrangements based on biological models
    • G06N3/02Neural networks
    • G06N3/04Architecture, e.g. interconnection topology
    • G06N3/047Probabilistic or stochastic networks

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Biomedical Technology (AREA)
  • General Engineering & Computer Science (AREA)
  • Artificial Intelligence (AREA)
  • Health & Medical Sciences (AREA)
  • Biophysics (AREA)
  • Computational Linguistics (AREA)
  • Data Mining & Analysis (AREA)
  • Evolutionary Computation (AREA)
  • General Health & Medical Sciences (AREA)
  • Molecular Biology (AREA)
  • Computing Systems (AREA)
  • Life Sciences & Earth Sciences (AREA)
  • General Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Software Systems (AREA)
  • Probability & Statistics with Applications (AREA)
  • Complex Calculations (AREA)
  • Multi Processors (AREA)
  • Image Analysis (AREA)
  • Harvester Elements (AREA)
  • Feedback Control In General (AREA)
  • Image Processing (AREA)
  • Color Image Communication Systems (AREA)
DE69115488T 1990-06-29 1991-06-28 Neuronale prozessoren für realwerteingangbearbeitung Expired - Fee Related DE69115488T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
GB909014569A GB9014569D0 (en) 1990-06-29 1990-06-29 Devices for use in neural processing
PCT/GB1991/001054 WO1992000573A1 (en) 1990-06-29 1991-06-28 Neural processing devices for handling real-valued inputs

Publications (2)

Publication Number Publication Date
DE69115488D1 true DE69115488D1 (de) 1996-01-25
DE69115488T2 DE69115488T2 (de) 1996-05-09

Family

ID=10678468

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69115488T Expired - Fee Related DE69115488T2 (de) 1990-06-29 1991-06-28 Neuronale prozessoren für realwerteingangbearbeitung

Country Status (10)

Country Link
US (2) US5175798A (de)
EP (1) EP0537208B1 (de)
JP (1) JPH05508041A (de)
AT (1) ATE131642T1 (de)
AU (2) AU8214591A (de)
BR (1) BR9106607A (de)
CA (1) CA2085896A1 (de)
DE (1) DE69115488T2 (de)
GB (1) GB9014569D0 (de)
WO (2) WO1992000572A1 (de)

Families Citing this family (25)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5324991A (en) * 1989-07-12 1994-06-28 Ricoh Company, Ltd. Neuron unit and neuron unit network
GB9014569D0 (en) * 1990-06-29 1990-08-22 Univ London Devices for use in neural processing
US5613039A (en) * 1991-01-31 1997-03-18 Ail Systems, Inc. Apparatus and method for motion detection and tracking of objects in a region for collision avoidance utilizing a real-time adaptive probabilistic neural network
US5563982A (en) * 1991-01-31 1996-10-08 Ail Systems, Inc. Apparatus and method for detection of molecular vapors in an atmospheric region
US5276772A (en) * 1991-01-31 1994-01-04 Ail Systems, Inc. Real time adaptive probabilistic neural network system and method for data sorting
JPH06511096A (ja) * 1991-06-21 1994-12-08 ユニバーシティー、カレッジ、ロンドン ニューロン処理に使用されるデバイス
GB9113553D0 (en) * 1991-06-21 1991-08-14 Univ London Neural network architecture
JPH05210649A (ja) * 1992-01-24 1993-08-20 Mitsubishi Electric Corp 神経回路網表現装置
WO1993018474A1 (en) * 1992-03-11 1993-09-16 University College London Devices for use in neural processing
JPH06203005A (ja) * 1992-10-27 1994-07-22 Eastman Kodak Co 高速区分化ニューラルネットワーク及びその構築方法
EP0636991A3 (de) * 1993-07-29 1997-01-08 Matsushita Electric Ind Co Ltd Informationsverarbeitungsgerät zur Durchführung eines neuronalen Netzwerkes.
US5542054A (en) * 1993-12-22 1996-07-30 Batten, Jr.; George W. Artificial neurons using delta-sigma modulation
GB2292239B (en) * 1994-07-30 1998-07-01 British Nuclear Fuels Plc Random pulse generation
AU8996198A (en) * 1997-09-04 1999-03-22 Camelot Information Technologies Ltd. Heterogeneous neural networks
IL137337A0 (en) * 1998-02-05 2001-07-24 Intellix As Network system
ATE208516T1 (de) 1998-02-05 2001-11-15 Intellix As Klassifizierungssystem und -verfahren mit n-tuple-oder ram-basiertem neuronalem netzwerk
US6256618B1 (en) 1998-04-23 2001-07-03 Christopher Spooner Computer architecture using self-manipulating trees
EP1093638B1 (de) 1998-06-23 2002-11-27 Intellix A/S Klassifizierungssystem und -verfahren mit n-tuple- oder ram-basiertem neuralem netzwerk
US6917443B1 (en) * 1998-11-18 2005-07-12 Xerox Corporation Composite halftone screens with stochastically distributed clusters or lines
US6980956B1 (en) * 1999-01-07 2005-12-27 Sony Corporation Machine apparatus and its driving method, and recorded medium
RU2445668C2 (ru) * 2009-12-22 2012-03-20 Государственное образовательное учреждение высшего профессионального образования "Санкт-Петербургский государственный горный институт имени Г.В. Плеханова (технический университет)" Нейросетевой регулятор для управления процессом обжига известняка в печах шахтного типа
US9628517B2 (en) * 2010-03-30 2017-04-18 Lenovo (Singapore) Pte. Ltd. Noise reduction during voice over IP sessions
US9189729B2 (en) * 2012-07-30 2015-11-17 International Business Machines Corporation Scalable neural hardware for the noisy-OR model of Bayesian networks
US9417845B2 (en) * 2013-10-02 2016-08-16 Qualcomm Incorporated Method and apparatus for producing programmable probability distribution function of pseudo-random numbers
US10839302B2 (en) 2015-11-24 2020-11-17 The Research Foundation For The State University Of New York Approximate value iteration with complex returns by bounding

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3327291A (en) * 1961-09-14 1967-06-20 Robert J Lee Self-synthesizing machine
US3613084A (en) * 1968-09-24 1971-10-12 Bell Telephone Labor Inc Trainable digital apparatus
US4040094A (en) * 1973-02-13 1977-08-02 International Publishing Corporation Ltd. Electronic screening
US4031501A (en) * 1975-02-04 1977-06-21 The United States Of America As Represented By The Secretary Of The Army Apparatus for electronically locating analog signals
JPS51116255A (en) * 1975-04-07 1976-10-13 Asahi Chemical Ind Tester for yarn quality
US4518866A (en) * 1982-09-28 1985-05-21 Psychologics, Inc. Method of and circuit for simulating neurons
US4809222A (en) * 1986-06-20 1989-02-28 Den Heuvel Raymond C Van Associative and organic memory circuits and methods
US5148385A (en) * 1987-02-04 1992-09-15 Texas Instruments Incorporated Serial systolic processor
US4996648A (en) * 1987-10-27 1991-02-26 Jourjine Alexander N Neural network using random binary code
US4807168A (en) * 1987-06-10 1989-02-21 The United States Of America As Represented By The Administrator, National Aeronautics And Space Administration Hybrid analog-digital associative neural network
US4972363A (en) * 1989-02-01 1990-11-20 The Boeing Company Neural network using stochastic processing
US5063521A (en) * 1989-11-03 1991-11-05 Motorola, Inc. Neuram: neural network with ram
GB9014569D0 (en) * 1990-06-29 1990-08-22 Univ London Devices for use in neural processing

Also Published As

Publication number Publication date
EP0537208B1 (de) 1995-12-13
AU8214591A (en) 1992-01-23
AU8192791A (en) 1992-01-23
WO1992000573A1 (en) 1992-01-09
US5175798A (en) 1992-12-29
DE69115488T2 (de) 1996-05-09
GB9014569D0 (en) 1990-08-22
WO1992000572A1 (en) 1992-01-09
BR9106607A (pt) 1993-06-01
JPH05508041A (ja) 1993-11-11
ATE131642T1 (de) 1995-12-15
CA2085896A1 (en) 1991-12-30
EP0537208A1 (de) 1993-04-21
US5475795A (en) 1995-12-12

Similar Documents

Publication Publication Date Title
DE69115488D1 (de) Neuronale prozessoren für realwerteingangbearbeitung
Smith et al. On branching processes in random environments
DE69217047D1 (de) Verbesserungen in neuronalnetzen
TW338864B (en) Information handling for interactive apparatus
KR880014486A (ko) 디더 이미지 발생장치
KR920015910A (ko) 연산회로
KR920002393A (ko) 자동차용 입력인터페이스
DE69210527D1 (de) Sicherheitsgerät für Ringnetzwerk
MY121677A (en) Non-instruction base register addressing in a data processing apparatus
EP0880101A3 (de) Vorrichtung und Verfahren für die schnelle Fourier-Transformation
FR2553540B1 (fr) Dispositif de test aleatoire pour circuits logiques, notamment microprocesseurs
KR920020323A (ko) 중앙연산처리장치
ES2159638T3 (es) Procedimiento y aparato para acceder a una memoria tampon de datos distribuida.
KR920007187A (ko) 반도체 기억장치
Shapiro et al. Prospects for simulation and simulators of dynamic systems
KR890003199A (ko) 필드 편향 회로
JPS55105719A (en) Buffer device
JPS6488839A (en) Addressing circuit
KR950025447A (ko) 반도체 시험장치용 패턴 발생기
JPS5782267A (en) Address career device
KR830004629A (ko) 문자 패턴의 제어방식
TW247976B (en) Circuit for matrix multiplication
Sahin Towards associative information systems for planning and control
KR940008824A (ko) 복수로보트의 동시제어방법
JPS6459537A (en) System for controlling cache memory of data processor

Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee