KR920015910A - 연산회로 - Google Patents

연산회로 Download PDF

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Publication number
KR920015910A
KR920015910A KR1019920000651A KR920000651A KR920015910A KR 920015910 A KR920015910 A KR 920015910A KR 1019920000651 A KR1019920000651 A KR 1019920000651A KR 920000651 A KR920000651 A KR 920000651A KR 920015910 A KR920015910 A KR 920015910A
Authority
KR
South Korea
Prior art keywords
data
calculation
circuit
sets
operation circuit
Prior art date
Application number
KR1019920000651A
Other languages
English (en)
Inventor
미쯔하루 오오끼
Original Assignee
오오가 노리오
소니 가부시끼가이샤
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 오오가 노리오, 소니 가부시끼가이샤 filed Critical 오오가 노리오
Publication of KR920015910A publication Critical patent/KR920015910A/ko

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Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/10—Complex mathematical operations
    • G06F17/14—Fourier, Walsh or analogous domain transformations, e.g. Laplace, Hilbert, Karhunen-Loeve, transforms
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/10—Complex mathematical operations
    • G06F17/16—Matrix or vector computation, e.g. matrix-matrix or matrix-vector multiplication, matrix factorization
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/10—Complex mathematical operations
    • G06F17/14—Fourier, Walsh or analogous domain transformations, e.g. Laplace, Hilbert, Karhunen-Loeve, transforms
    • G06F17/147—Discrete orthonormal transforms, e.g. discrete cosine transform, discrete sine transform, and variations therefrom, e.g. modified discrete cosine transform, integer transforms approximating the discrete cosine transform
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N7/00—Television systems
    • H04N7/12—Systems in which the television signal is transmitted via one channel or a plurality of parallel channels, the bandwidth of each channel being less than the bandwidth of the television signal

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Data Mining & Analysis (AREA)
  • Theoretical Computer Science (AREA)
  • Mathematical Analysis (AREA)
  • Pure & Applied Mathematics (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Optimization (AREA)
  • Databases & Information Systems (AREA)
  • Software Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Algebra (AREA)
  • Computing Systems (AREA)
  • Discrete Mathematics (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Complex Calculations (AREA)
  • Compression Or Coding Systems Of Tv Signals (AREA)

Abstract

내용 없음

Description

연산회로
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 본 발명에 의한 연산회로의 일실시예의 구성을 나타낸 블럭도, 제2도는 본 실시예에 있서 32차원의 내적연산회로(7A) 및 (7B)의 구성예를 나타낸 블록도, 제3도는 본 발명에 의한 연산회로의 다른 실시예의 구성을 나타낸 블럭도, 제4도는 제3도 연산회로의 중간출력 블럭(12A)의 구성예를 나타낸 블록도, 제5도는 제4도 중간출력 블거의 〈y〉, 〈z〉계산블럭(16)의 구성예를 나타낸 블록도.

Claims (1)

  1. 복수조의 입력데이터군을 각각 병렬처리하여 그들의 출력결과중 불필요한 데이터를 버리고 필요한 데이터만을 취출하는 연산회로에 있어서, 상기 복수조의 입력데이터군의 중간처리 결과내의 임의의 데이터를 선택하는 데이터 선택회로와, 상기 데이터 선택회로의 출력에 소정의 연산을 실시하는 연산처리회로를 설치하고, 최종단계에서의 연산을 공유하도록한 것을 특징으로 하는 연산회로.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019920000651A 1991-01-18 1992-01-17 연산회로 KR920015910A (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP91-018456 1991-01-18
JP3018456A JPH04236664A (ja) 1991-01-18 1991-01-18 演算回路

Publications (1)

Publication Number Publication Date
KR920015910A true KR920015910A (ko) 1992-08-27

Family

ID=11972135

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019920000651A KR920015910A (ko) 1991-01-18 1992-01-17 연산회로

Country Status (3)

Country Link
US (1) US5309527A (ko)
JP (1) JPH04236664A (ko)
KR (1) KR920015910A (ko)

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EP0576749B1 (en) 1992-06-30 1999-06-02 Discovision Associates Data pipeline system
GB9405914D0 (en) 1994-03-24 1994-05-11 Discovision Ass Video decompression
EP0575675B1 (en) * 1992-06-26 1998-11-25 Discovision Associates Method and apparatus for transformation of signals from a frequency to a time domaine
US6067417A (en) 1992-06-30 2000-05-23 Discovision Associates Picture start token
US6112017A (en) 1992-06-30 2000-08-29 Discovision Associates Pipeline processing machine having a plurality of reconfigurable processing stages interconnected by a two-wire interface bus
US5768561A (en) 1992-06-30 1998-06-16 Discovision Associates Tokens-based adaptive video processing arrangement
US5603012A (en) * 1992-06-30 1997-02-11 Discovision Associates Start code detector
US6047112A (en) 1992-06-30 2000-04-04 Discovision Associates Technique for initiating processing of a data stream of encoded video information
US6079009A (en) 1992-06-30 2000-06-20 Discovision Associates Coding standard token in a system compromising a plurality of pipeline stages
US5809270A (en) 1992-06-30 1998-09-15 Discovision Associates Inverse quantizer
US6330665B1 (en) 1992-06-30 2001-12-11 Discovision Associates Video parser
US6263422B1 (en) 1992-06-30 2001-07-17 Discovision Associates Pipeline processing machine with interactive stages operable in response to tokens and system and methods relating thereto
US5699544A (en) 1993-06-24 1997-12-16 Discovision Associates Method and apparatus for using a fixed width word for addressing variable width data
US5805914A (en) 1993-06-24 1998-09-08 Discovision Associates Data pipeline system and data encoding method
US5829007A (en) 1993-06-24 1998-10-27 Discovision Associates Technique for implementing a swing buffer in a memory array
US5861894A (en) 1993-06-24 1999-01-19 Discovision Associates Buffer manager
US5566250A (en) * 1994-01-14 1996-10-15 Intel Corporation Process and apparatus for pseudo-SIMD processing of image data
CA2145363C (en) 1994-03-24 1999-07-13 Anthony Mark Jones Ram interface
CA2145379C (en) 1994-03-24 1999-06-08 William P. Robbins Method and apparatus for addressing memory
CA2145365C (en) 1994-03-24 1999-04-27 Anthony M. Jones Method for accessing banks of dram
GB9417138D0 (en) 1994-08-23 1994-10-12 Discovision Ass Data rate conversion
JPH09106389A (ja) * 1995-10-12 1997-04-22 Sony Corp 信号処理装置
WO1998041026A1 (en) * 1997-03-12 1998-09-17 Matsushita Electric Industrial Co., Ltd. Encoding method, encoder and recording medium, and decoding method, decoder and recording medium
WO1999039303A1 (en) * 1998-02-02 1999-08-05 The Trustees Of The University Of Pennsylvania Method and system for computing 8x8 dct/idct and a vlsi implementation
SG105500A1 (en) * 2000-06-30 2004-08-27 Intel Corp General purpose register file architecture for aligned simd
US7120781B1 (en) 2000-06-30 2006-10-10 Intel Corporation General purpose register file architecture for aligned simd

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4293920A (en) * 1979-09-04 1981-10-06 Merola Pasquale A Two-dimensional transform processor
JPS5758292A (en) * 1980-09-25 1982-04-07 Fanuc Ltd File deleting method for bubble cassette memory
US4829465A (en) * 1986-06-19 1989-05-09 American Telephone And Telegraph Company, At&T Bell Laboratories High speed cosine transform
US4866653A (en) * 1986-08-04 1989-09-12 Ulrich Kulisch Circuitry for generating sums, especially scalar products
US4791598A (en) * 1987-03-24 1988-12-13 Bell Communications Research, Inc. Two-dimensional discrete cosine transform processor
GB8713455D0 (en) * 1987-06-09 1987-07-15 Sony Corp Television standards converters
US4914615A (en) * 1987-09-04 1990-04-03 At&T Bell Laboratories Calculator of matrix products
US5054103A (en) * 1987-09-24 1991-10-01 Matsushita Electric Works, Ltd. Picture encoding system
JPH0375868A (ja) * 1989-08-17 1991-03-29 Sony Corp 行列データ乗算装置
JPH03102567A (ja) * 1989-09-18 1991-04-26 Sony Corp 行列乗算回路
US5007100A (en) * 1989-10-10 1991-04-09 Unisys Corporation Diagnostic system for a parallel pipelined image processing system
JP3185211B2 (ja) * 1989-12-15 2001-07-09 ソニー株式会社 行列データ乗算装置
US5126962A (en) * 1990-07-11 1992-06-30 Massachusetts Institute Of Technology Discrete cosine transform processing system

Also Published As

Publication number Publication date
JPH04236664A (ja) 1992-08-25
US5309527A (en) 1994-05-03

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