DE69113987D1 - Monolitische Halbleiteranordnung bestehend aus einer integrierten Kontrollschaltung und aus mindestens einem Leistungstransistor, die auf demselben Chip integriert sind und Herstellungsverfahren. - Google Patents

Monolitische Halbleiteranordnung bestehend aus einer integrierten Kontrollschaltung und aus mindestens einem Leistungstransistor, die auf demselben Chip integriert sind und Herstellungsverfahren.

Info

Publication number
DE69113987D1
DE69113987D1 DE69113987T DE69113987T DE69113987D1 DE 69113987 D1 DE69113987 D1 DE 69113987D1 DE 69113987 T DE69113987 T DE 69113987T DE 69113987 T DE69113987 T DE 69113987T DE 69113987 D1 DE69113987 D1 DE 69113987D1
Authority
DE
Germany
Prior art keywords
integrated
control circuit
production method
power transistor
same chip
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69113987T
Other languages
English (en)
Other versions
DE69113987T2 (de
Inventor
Raffaele Zambrano
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
CORIMME Consorzio per Ricerca Sulla Microelettronica nel Mezzogiorno
Original Assignee
CORIMME Consorzio per Ricerca Sulla Microelettronica nel Mezzogiorno
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by CORIMME Consorzio per Ricerca Sulla Microelettronica nel Mezzogiorno filed Critical CORIMME Consorzio per Ricerca Sulla Microelettronica nel Mezzogiorno
Application granted granted Critical
Publication of DE69113987D1 publication Critical patent/DE69113987D1/de
Publication of DE69113987T2 publication Critical patent/DE69113987T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/74Making of localized buried regions, e.g. buried collector layers, internal connections substrate contacts
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/761PN junctions
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8222Bipolar technology
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/08Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
    • H01L27/082Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including bipolar components only
    • H01L27/0823Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including bipolar components only including vertical bipolar transistors only

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Bipolar Integrated Circuits (AREA)
  • Bipolar Transistors (AREA)
  • Element Separation (AREA)
DE69113987T 1986-10-01 1991-04-17 Monolitische Halbleiteranordnung bestehend aus einer integrierten Kontrollschaltung und aus mindestens einem Leistungstransistor, die auf demselben Chip integriert sind und Herstellungsverfahren. Expired - Fee Related DE69113987T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
IT8606613A IT1215024B (it) 1986-10-01 1986-10-01 Processo per la formazione di un dispositivo monolitico a semiconduttore di alta tensione
EP91830151A EP0509183B1 (de) 1986-10-01 1991-04-17 Monolitische Halbleiteranordnung bestehend aus einer integrierten Kontrollschaltung und aus mindestens einem Leistungstransistor, die auf demselben Chip integriert sind und Herstellungsverfahren

Publications (2)

Publication Number Publication Date
DE69113987D1 true DE69113987D1 (de) 1995-11-23
DE69113987T2 DE69113987T2 (de) 1996-04-25

Family

ID=40227708

Family Applications (2)

Application Number Title Priority Date Filing Date
DE87201791T Expired - Fee Related DE3788486T2 (de) 1986-10-01 1987-09-19 Verfahren zur Herstellung einer monolithischen Hochspannungshalbleiterschaltung.
DE69113987T Expired - Fee Related DE69113987T2 (de) 1986-10-01 1991-04-17 Monolitische Halbleiteranordnung bestehend aus einer integrierten Kontrollschaltung und aus mindestens einem Leistungstransistor, die auf demselben Chip integriert sind und Herstellungsverfahren.

Family Applications Before (1)

Application Number Title Priority Date Filing Date
DE87201791T Expired - Fee Related DE3788486T2 (de) 1986-10-01 1987-09-19 Verfahren zur Herstellung einer monolithischen Hochspannungshalbleiterschaltung.

Country Status (5)

Country Link
US (2) US4780430A (de)
EP (2) EP0262723B1 (de)
JP (2) JP2501602B2 (de)
DE (2) DE3788486T2 (de)
IT (1) IT1215024B (de)

Families Citing this family (32)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
IT1221587B (it) * 1987-09-07 1990-07-12 S G S Microelettronics Spa Procedimento di fabbricazione di un dispositivo integrato monolitico a semiconduttore avente strati epitas siali a bassa concentrazione di impurita'
USRE38510E1 (en) * 1987-12-22 2004-05-04 Stmicroelectronics Srl Manufacturing process for a monolithic semiconductor device comprising at least one transistor of an integrated control circuit and one power transistor integrated on the same chip
IT1217323B (it) * 1987-12-22 1990-03-22 Sgs Microelettronica Spa Struttura integrata di transistor bipolare di potenza di alta tensione e di transistor mos di potenza di bassa tensione nella configurazione"emitter switching"e relativo processo di fabbricazione
IT1217322B (it) * 1987-12-22 1990-03-22 Sgs Microelettronica Spa Procedimento di fabbricazione di un dispositivo nonolitico a semiconduttope comprendente almeno un transistor di un circuito integrato di comando e un transistor di rotenza in tegrato nella stessa piastrina
US4902633A (en) * 1988-05-09 1990-02-20 Motorola, Inc. Process for making a bipolar integrated circuit
IT1228900B (it) * 1989-02-27 1991-07-09 Sgs Thomson Microelectronics Struttura integrata monolitica per sistema di pilotaggio a due stadi con componente circuitale traslatore di livello del segnale di pilotaggio per transistori di potenza.
US5246871A (en) * 1989-06-16 1993-09-21 Sgs-Thomson Microelectronics S.R.L. Method of manufacturing a semiconductor device comprising a control circuit and a power stage with a vertical current flow, integrated in monolithic form on a single chip
GB2248142A (en) * 1990-09-19 1992-03-25 Koninkl Philips Electronics Nv A method of manufacturing a semiconductor device
US5597742A (en) * 1991-04-17 1997-01-28 Consorzio Per La Ricerca Sulla Microelettronica Nel Mezzogiorno Semiconductor device and method
KR100243961B1 (ko) * 1991-07-02 2000-02-01 요트.게.아. 롤페즈 반도체장치
EP0632502B1 (de) * 1993-06-28 1999-03-17 Consorzio per la Ricerca sulla Microelettronica nel Mezzogiorno Bipolar-Leistungstransistor mit hoher Kollektor-Durchbrucksspannung und Verfahren zu seiner Herstellung
US5591655A (en) * 1995-02-28 1997-01-07 Sgs-Thomson Microelectronics, Inc. Process for manufacturing a vertical switched-emitter structure with improved lateral isolation
DE69533773D1 (de) 1995-03-31 2004-12-23 Cons Ric Microelettronica Verfahren zur Herstellung von Isolationsgraben
US5633180A (en) * 1995-06-01 1997-05-27 Harris Corporation Method of forming P-type islands over P-type buried layer
DE69534488D1 (de) * 1995-07-31 2006-02-09 St Microelectronics Srl Monolitische Hochspannungshalbleiteranordnung mit integrierter Randstruktur und Verfahren zur Herstellung
EP0780900B1 (de) * 1995-12-19 2003-04-02 Consorzio per la Ricerca sulla Microelettronica nel Mezzogiorno - CoRiMMe Monolithische Halbleiteranordnung mit Randstruktur und Verfahren zur Herstellung
EP0788151A1 (de) * 1996-01-31 1997-08-06 Consorzio per la Ricerca sulla Microelettronica nel Mezzogiorno - CoRiMMe Verfahren zur Herstellung von übergangsisolierten Halbleiteranordnungen
US6365447B1 (en) 1998-01-12 2002-04-02 National Semiconductor Corporation High-voltage complementary bipolar and BiCMOS technology using double expitaxial growth
EP0981163A1 (de) 1998-08-14 2000-02-23 STMicroelectronics S.r.l. Halbleiter-Leistungsbauelement mit isoliertem Schaltkreis und Herstellungsverfahren
EP1037274A3 (de) * 1998-10-23 2001-03-14 STMicroelectronics S.r.l. Auf einem Halbleiter integriertes elektronisches Leistungsbauelement mit einem ersten Bereich für das Leistungsbauelement und mindestens einem zweiten Bereich und einer Isolationsstruktur mit begrenzter Flächengrösse
EP1032031B1 (de) * 1998-10-23 2007-10-10 STMicroelectronics S.r.l. Monolithisch auf einem Halbleiter integriertes elektronisches Leistungsbauelement mit Strukturen zum Schutz der Ecken mit begrenzter Flächengrösse und zugehöriges Herstellungsverfahren
DE69936175T2 (de) * 1998-11-04 2008-01-24 Lucent Technologies Inc. Induktivität oder Leiterbahn mit geringem Verlust in einer integrierten Schaltung
EP1043775B1 (de) * 1999-04-06 2006-06-14 STMicroelectronics S.r.l. Integrierter Leistungsschaltkreis mit vertikalem Stromfluss und dessen Herstellungsverfahren
US6451655B1 (en) 1999-08-26 2002-09-17 Stmicroelectronics S.R.L. Electronic power device monolithically integrated on a semiconductor and comprising a first power region and at least a second region as well as an isolation structure of limited planar dimension
US6495423B1 (en) 1999-08-26 2002-12-17 Stmicroelectronics S.R.L. Electronic power device monolithically integrated on a semiconductor and comprising edge protection structures having a limited planar dimension
US6642538B2 (en) 2001-10-24 2003-11-04 The United States Of America As Represented By The Secretary Of The Navy Voltage controlled nonlinear spin filter based on paramagnetic ion doped nanocrystal
WO2004079789A2 (en) * 2003-03-05 2004-09-16 Rensselaer Polytechnic Institute Interstage isolation in darlington transistors
US7714381B2 (en) * 2005-04-01 2010-05-11 Semiconductor Components Industries, Llc Method of forming an integrated power device and structure
EP1724822A3 (de) * 2005-05-17 2007-01-24 Sumco Corporation Halbleitersubstrat und Verfahren zu dessen Herstellung
JP5048242B2 (ja) * 2005-11-30 2012-10-17 オンセミコンダクター・トレーディング・リミテッド 半導体装置及びその製造方法
CN107887486B (zh) * 2017-09-26 2024-04-05 华润微集成电路(无锡)有限公司 一种光电晶体管及其制作方法
US20210343582A1 (en) * 2018-10-12 2021-11-04 Search For The Next, LTD. Methods of manufacturing a transistor device

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3982974A (en) * 1971-11-22 1976-09-28 International Business Machines Corporation Compensation of autodoping in the manufacture of integrated circuits
US4132573A (en) * 1977-02-08 1979-01-02 Murata Manufacturing Co., Ltd. Method of manufacturing a monolithic integrated circuit utilizing epitaxial deposition and simultaneous outdiffusion
US4458158A (en) * 1979-03-12 1984-07-03 Sprague Electric Company IC Including small signal and power devices
JPS5674940A (en) * 1979-11-22 1981-06-20 Mitsubishi Electric Corp Integrated semiconductor device
JPS5687360A (en) * 1979-12-19 1981-07-15 Pioneer Electronic Corp Transistor device
JPS5726462A (en) * 1980-07-24 1982-02-12 Mitsubishi Electric Corp Semiconductor device
JPS6058633A (ja) * 1983-09-12 1985-04-04 Hitachi Ltd 半導体集積回路装置
JPH0614515B2 (ja) * 1984-03-21 1994-02-23 セイコ−エプソン株式会社 半導体装置の製造方法
IT1214805B (it) * 1984-08-21 1990-01-18 Ates Componenti Elettron Spositivi a semiconduttore con giunprocesso per la fabbricazione di dizioni planari a concentrazione di carica variabile e ad altissima tensione di breakdown
IT1214806B (it) * 1984-09-21 1990-01-18 Ates Componenti Elettron Dispositivo integrato monolitico di potenza e semiconduttore
IT1214808B (it) * 1984-12-20 1990-01-18 Ates Componenti Elettron Tico e semiconduttore processo per la formazione di uno strato sepolto e di una regione di collettore in un dispositivo monoli
IT1218230B (it) * 1988-04-28 1990-04-12 Sgs Thomson Microelectronics Procedimento per la formazione di un circuito integrato su un substrato di tipo n,comprendente transistori pnp e npn verticali e isolati fra loro
US5034337A (en) * 1989-02-10 1991-07-23 Texas Instruments Incorporated Method of making an integrated circuit that combines multi-epitaxial power transistors with logic/analog devices

Also Published As

Publication number Publication date
EP0262723B1 (de) 1993-12-15
DE3788486D1 (de) 1994-01-27
JPH05121678A (ja) 1993-05-18
IT1215024B (it) 1990-01-31
US5432376A (en) 1995-07-11
US4780430A (en) 1988-10-25
EP0262723A3 (en) 1990-05-23
EP0509183A1 (de) 1992-10-21
DE69113987T2 (de) 1996-04-25
EP0509183B1 (de) 1995-10-18
JPS6392058A (ja) 1988-04-22
EP0262723A2 (de) 1988-04-06
JP2501602B2 (ja) 1996-05-29
DE3788486T2 (de) 1994-04-28
JP3202785B2 (ja) 2001-08-27
IT8606613A0 (it) 1986-10-01

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Legal Events

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8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee