DE69106231T2 - DRAM mit Sperrschicht. - Google Patents

DRAM mit Sperrschicht.

Info

Publication number
DE69106231T2
DE69106231T2 DE69106231T DE69106231T DE69106231T2 DE 69106231 T2 DE69106231 T2 DE 69106231T2 DE 69106231 T DE69106231 T DE 69106231T DE 69106231 T DE69106231 T DE 69106231T DE 69106231 T2 DE69106231 T2 DE 69106231T2
Authority
DE
Germany
Prior art keywords
dram
junction
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69106231T
Other languages
English (en)
Other versions
DE69106231D1 (de
Inventor
Kaoru Narita
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Micron Memory Japan Ltd
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Application granted granted Critical
Publication of DE69106231D1 publication Critical patent/DE69106231D1/de
Publication of DE69106231T2 publication Critical patent/DE69106231T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • H10B12/31—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells having a storage electrode stacked over the transistor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • H10B12/37—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells the capacitor being at least partially in a trench in the substrate
DE69106231T 1990-06-19 1991-06-18 DRAM mit Sperrschicht. Expired - Lifetime DE69106231T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2160192A JPH0449654A (ja) 1990-06-19 1990-06-19 半導体メモリ

Publications (2)

Publication Number Publication Date
DE69106231D1 DE69106231D1 (de) 1995-02-09
DE69106231T2 true DE69106231T2 (de) 1995-08-10

Family

ID=15709807

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69106231T Expired - Lifetime DE69106231T2 (de) 1990-06-19 1991-06-18 DRAM mit Sperrschicht.

Country Status (5)

Country Link
US (1) US5859451A (de)
EP (1) EP0462576B1 (de)
JP (1) JPH0449654A (de)
KR (1) KR950014538B1 (de)
DE (1) DE69106231T2 (de)

Families Citing this family (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5283453A (en) * 1992-10-02 1994-02-01 International Business Machines Corporation Trench sidewall structure
TW241392B (de) * 1993-04-22 1995-02-21 Ibm
US5874364A (en) * 1995-03-27 1999-02-23 Fujitsu Limited Thin film deposition method, capacitor device and method for fabricating the same, and semiconductor device and method for fabricating the same
JP2904341B2 (ja) * 1996-03-06 1999-06-14 日本電気株式会社 半導体装置およびその製造方法
JPH11163329A (ja) 1997-11-27 1999-06-18 Mitsubishi Electric Corp 半導体装置およびその製造方法
JP2000133700A (ja) * 1998-10-22 2000-05-12 Mitsubishi Electric Corp 半導体装置およびその製造方法
US6194736B1 (en) * 1998-12-17 2001-02-27 International Business Machines Corporation Quantum conductive recrystallization barrier layers
US6177333B1 (en) * 1999-01-14 2001-01-23 Micron Technology, Inc. Method for making a trench isolation for semiconductor devices
DE19911149C1 (de) * 1999-03-12 2000-05-18 Siemens Ag Integrierte Schaltungsanordnung, die eine in einem Substrat vergrabene leitende Struktur umfaßt, die mit einem Gebiet des Substrats elektrisch verbunden ist, und Verfahren zu deren Herstellung
TW483152B (en) * 1999-07-01 2002-04-11 Ibm Improved methods of forming the buried strap and its quantum barrier in deep trench cell capacitors
DE19946719A1 (de) * 1999-09-29 2001-04-19 Infineon Technologies Ag Grabenkondensator und Verfahren zu seiner Herstellung
US6900513B2 (en) * 2001-01-22 2005-05-31 Nec Electronics Corporation Semiconductor memory device and manufacturing method thereof
US6661044B2 (en) * 2001-10-22 2003-12-09 Winbond Electronics Corp. Method of manufacturing MOSEFT and structure thereof
US6515325B1 (en) * 2002-03-06 2003-02-04 Micron Technology, Inc. Nanotube semiconductor devices and methods for making the same
JP2004022642A (ja) 2002-06-13 2004-01-22 Toshiba Corp 半導体装置およびその製造方法
JP2004253730A (ja) * 2003-02-21 2004-09-09 Renesas Technology Corp 半導体集積回路装置およびその製造方法
US6873003B2 (en) * 2003-03-06 2005-03-29 Infineon Technologies Aktiengesellschaft Nonvolatile memory cell
US7170736B2 (en) * 2003-08-28 2007-01-30 Tessera, Inc. Capacitor having low resistance electrode including a thin silicon layer
JP5515429B2 (ja) * 2009-06-01 2014-06-11 富士通セミコンダクター株式会社 半導体装置の製造方法
CN108257957A (zh) * 2016-12-29 2018-07-06 联华电子股份有限公司 半导体结构及其制作方法

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61150366A (ja) * 1984-12-25 1986-07-09 Nec Corp Ｍｉｓ型メモリ−セル
JPS61179568A (ja) * 1984-12-29 1986-08-12 Fujitsu Ltd 半導体記憶装置の製造方法
EP0283964B1 (de) * 1987-03-20 1994-09-28 Nec Corporation Aus einer Vielzahl von Eintransistorzellen bestehende dynamische Speichervorrichtung mit wahlfreiem Zugriff
JPS63258060A (ja) * 1987-04-15 1988-10-25 Nec Corp 半導体記憶装置
JP2548957B2 (ja) * 1987-11-05 1996-10-30 富士通株式会社 半導体記憶装置の製造方法
JPH01183152A (ja) * 1988-01-18 1989-07-20 Oki Electric Ind Co Ltd 半導体記憶装置及びその製造方法
JPH01243460A (ja) * 1988-03-25 1989-09-28 Hitachi Ltd 半導体記憶装置の製造方法
JP2776826B2 (ja) * 1988-04-15 1998-07-16 株式会社日立製作所 半導体装置およびその製造方法
US5091761A (en) * 1988-08-22 1992-02-25 Hitachi, Ltd. Semiconductor device having an arrangement of IGFETs and capacitors stacked thereover
JPH0262073A (ja) * 1988-08-26 1990-03-01 Mitsubishi Electric Corp 半導体記憶装置
JPH07114257B2 (ja) * 1988-11-15 1995-12-06 三菱電機株式会社 半導体装置
EP0370407A1 (de) * 1988-11-18 1990-05-30 Nec Corporation Halbleiterspeicherbauteil vom Typ 1-transistor-1-Kondensator-Speicherzelle
JP2537413B2 (ja) * 1989-03-14 1996-09-25 三菱電機株式会社 半導体装置およびその製造方法
US5006481A (en) * 1989-11-30 1991-04-09 Sgs-Thomson Microelectronics, Inc. Method of making a stacked capacitor DRAM cell
US5005103A (en) * 1990-06-05 1991-04-02 Samsung Electronics Co., Ltd. Method of manufacturing folded capacitors in semiconductor and folded capacitors fabricated thereby

Also Published As

Publication number Publication date
US5859451A (en) 1999-01-12
EP0462576B1 (de) 1994-12-28
EP0462576A1 (de) 1991-12-27
KR950014538B1 (ko) 1995-12-05
DE69106231D1 (de) 1995-02-09
JPH0449654A (ja) 1992-02-19
KR920001731A (ko) 1992-01-30

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: NEC CORP., TOKIO/TOKYO, JP

Owner name: NEC ELECTRONICS CORP., KAWASAKI, KANAGAWA, JP

8327 Change in the person/name/address of the patent owner

Owner name: ELPIDA MEMORY, INC., TOKYO, JP