DE69025918D1 - Verfahren zur herstellung einer biegsamen schaltungsplatte zum montieren von integrierten schaltungen - Google Patents

Verfahren zur herstellung einer biegsamen schaltungsplatte zum montieren von integrierten schaltungen

Info

Publication number
DE69025918D1
DE69025918D1 DE69025918T DE69025918T DE69025918D1 DE 69025918 D1 DE69025918 D1 DE 69025918D1 DE 69025918 T DE69025918 T DE 69025918T DE 69025918 T DE69025918 T DE 69025918T DE 69025918 D1 DE69025918 D1 DE 69025918D1
Authority
DE
Germany
Prior art keywords
producing
circuit board
integrated circuits
bendable circuit
mounting integrated
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69025918T
Other languages
English (en)
Other versions
DE69025918T2 (de
Inventor
Chikafumi Oomachi
Yasuyuki Tanaka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Mektron KK
Original Assignee
Nippon Mektron KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP1288434A external-priority patent/JP2753746B2/ja
Application filed by Nippon Mektron KK filed Critical Nippon Mektron KK
Publication of DE69025918D1 publication Critical patent/DE69025918D1/de
Application granted granted Critical
Publication of DE69025918T2 publication Critical patent/DE69025918T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/50—Tape automated bonding [TAB] connectors, i.e. film carriers; Manufacturing methods related thereto
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/50—Tape automated bonding [TAB] connectors, i.e. film carriers; Manufacturing methods related thereto

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)
DE69025918T 1989-11-06 1990-11-02 Verfahren zur herstellung einer biegsamen schaltungsplatte zum montieren von integrierten schaltungen Expired - Lifetime DE69025918T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP1288434A JP2753746B2 (ja) 1989-11-06 1989-11-06 Ｉｃ搭載用可撓性回路基板及びその製造法
PCT/JP1990/001413 WO1991006977A1 (en) 1989-11-06 1990-11-02 Flexible circuit board for mounting ic and method of producing the same

Publications (2)

Publication Number Publication Date
DE69025918D1 true DE69025918D1 (de) 1996-04-18
DE69025918T2 DE69025918T2 (de) 1996-07-25

Family

ID=17730165

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69025918T Expired - Lifetime DE69025918T2 (de) 1989-11-06 1990-11-02 Verfahren zur herstellung einer biegsamen schaltungsplatte zum montieren von integrierten schaltungen

Country Status (1)

Country Link
DE (1) DE69025918T2 (de)

Also Published As

Publication number Publication date
DE69025918T2 (de) 1996-07-25

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition