DE69020641D1 - Synchronisation einer Sequenz. - Google Patents

Synchronisation einer Sequenz.

Info

Publication number
DE69020641D1
DE69020641D1 DE69020641T DE69020641T DE69020641D1 DE 69020641 D1 DE69020641 D1 DE 69020641D1 DE 69020641 T DE69020641 T DE 69020641T DE 69020641 T DE69020641 T DE 69020641T DE 69020641 D1 DE69020641 D1 DE 69020641D1
Authority
DE
Germany
Prior art keywords
synchronization
sequence
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69020641T
Other languages
English (en)
Other versions
DE69020641T2 (de
Inventor
David Anthony Fisher
Simon Daniel Brueckheimer
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nortel Networks Ltd
Original Assignee
Northern Telecom Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from GB898910254A external-priority patent/GB8910254D0/en
Priority claimed from GB909005073A external-priority patent/GB9005073D0/en
Application filed by Northern Telecom Ltd filed Critical Northern Telecom Ltd
Application granted granted Critical
Publication of DE69020641D1 publication Critical patent/DE69020641D1/de
Publication of DE69020641T2 publication Critical patent/DE69020641T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/04—Speed or phase control by synchronisation signals
    • H04L7/041—Speed or phase control by synchronisation signals using special codes as synchronising signal
    • H04L7/043—Pseudo-noise [PN] codes variable during transmission
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/03—Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
    • H04L25/03828—Arrangements for spectral shaping; Arrangements for providing signals with specified spectral properties
    • H04L25/03866—Arrangements for spectral shaping; Arrangements for providing signals with specified spectral properties using scrambling
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/54—Store-and-forward switching systems 
    • H04L12/56—Packet switching systems
    • H04L12/5601—Transfer mode dependent, e.g. ATM
    • H04L2012/5672—Multiplexing, e.g. coding, scrambling
    • H04L2012/5673—Coding or scrambling
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/04—Speed or phase control by synchronisation signals
    • H04L7/048—Speed or phase control by synchronisation signals using the properties of error detecting or error correcting codes, e.g. parity as synchronisation signal
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/04—Speed or phase control by synchronisation signals
    • H04L7/08—Speed or phase control by synchronisation signals the synchronisation signals recurring cyclically

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Physics & Mathematics (AREA)
  • Spectroscopy & Molecular Physics (AREA)
  • Power Engineering (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Detection And Prevention Of Errors In Transmission (AREA)
  • Time-Division Multiplex Systems (AREA)
  • Communication Control (AREA)
DE69020641T 1989-05-04 1990-05-02 Synchronisation einer Sequenz. Expired - Lifetime DE69020641T2 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
GB898910254A GB8910254D0 (en) 1989-05-04 1989-05-04 Pseudo random sequence synchronisation
GB909000604A GB9000604D0 (en) 1989-05-04 1990-01-11 Sequence synchronisation
GB909005073A GB9005073D0 (en) 1989-05-04 1990-03-07 Scrambler synchronisation

Publications (2)

Publication Number Publication Date
DE69020641D1 true DE69020641D1 (de) 1995-08-10
DE69020641T2 DE69020641T2 (de) 1995-11-30

Family

ID=27264461

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69020641T Expired - Lifetime DE69020641T2 (de) 1989-05-04 1990-05-02 Synchronisation einer Sequenz.

Country Status (7)

Country Link
US (1) US5237593A (de)
EP (1) EP0397384B1 (de)
JP (1) JP3049296B2 (de)
AU (1) AU633904B2 (de)
DE (1) DE69020641T2 (de)
GB (1) GB2233861B (de)
NO (1) NO303100B1 (de)

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GB9020410D0 (en) * 1990-09-19 1990-10-31 Stc Plc Sequence synchronisation
JP3051223B2 (ja) * 1991-10-02 2000-06-12 富士通株式会社 セル送信回路
US5544179A (en) * 1992-03-30 1996-08-06 Hartwell; David Mis-synchronization detection system using a combined error correcting and cycle identifier code
KR950008397B1 (ko) * 1992-04-21 1995-07-28 이병기 분산 표본 스크램블링 시스템
US5544180A (en) * 1992-06-08 1996-08-06 Qlogic Corporation Error-tolerant byte synchronization recovery scheme
US5481469A (en) * 1993-09-13 1996-01-02 Vlsi Technology, Inc. Automatic power vector generation for sequential circuits
DE19725444A1 (de) * 1997-06-16 1998-12-17 Siemens Ag Verfahren zur Berechtigungsüberprüfung und Anordnung zum Durchführen dieses Verfahrens
US6055285A (en) * 1997-11-17 2000-04-25 Qlogic Corporation Synchronization circuit for transferring pointer between two asynchronous circuits
US6163550A (en) * 1997-11-17 2000-12-19 Qlogic Corporation State dependent synchronization circuit which synchronizes leading and trailing edges of asynchronous input pulses
GB2342015B (en) * 1998-09-23 2003-11-05 Sony Uk Ltd Synchronising digital signals
US6716204B1 (en) 1998-10-28 2004-04-06 The Procter & Gamble Company Absorbent article with improved feces containment characteristics
EP1129594A1 (de) * 1998-11-12 2001-09-05 Telefonaktiebolaget L M Ericsson (Publ) System und verfahren für sichere übertragung von zwischenzeitlicher mobilnutzer information
US6377999B1 (en) * 1999-05-10 2002-04-23 Interniche Technologies Inc. Firmware and software protocol parser
IL132859A (en) * 1999-11-10 2008-07-08 Nds Ltd Data stream processing system
US6909785B1 (en) 1999-11-11 2005-06-21 Qualcomm, Inc. Method and apparatus for efficient irregular synchronization of a stream cipher
GB0117926D0 (en) 2001-07-23 2001-09-12 Nds Ltd Method for random access to encrypted content
US20030126276A1 (en) * 2002-01-02 2003-07-03 Kime Gregory C. Automated content integrity validation for streaming data
US6539051B1 (en) * 2002-03-11 2003-03-25 Cypress Semiconductor Corporation Parallel framer and transport protocol with distributed framing and continuous data
US7111228B1 (en) 2002-05-07 2006-09-19 Marvell International Ltd. System and method for performing parity checks in disk storage system
US20030217320A1 (en) * 2002-05-20 2003-11-20 Gorshe Steven Scott Cyclic redundancy check circuit for use with self-synchronous scramblers
US7287102B1 (en) 2003-01-31 2007-10-23 Marvell International Ltd. System and method for concatenating data
US7007114B1 (en) * 2003-01-31 2006-02-28 Qlogic Corporation System and method for padding data blocks and/or removing padding from data blocks in storage controllers
US7064915B1 (en) 2003-03-10 2006-06-20 Marvell International Ltd. Method and system for collecting servo field data from programmable devices in embedded disk controllers
US7457903B2 (en) 2003-03-10 2008-11-25 Marvell International Ltd. Interrupt controller for processing fast and regular interrupts
US7492545B1 (en) 2003-03-10 2009-02-17 Marvell International Ltd. Method and system for automatic time base adjustment for disk drive servo controllers
US7039771B1 (en) 2003-03-10 2006-05-02 Marvell International Ltd. Method and system for supporting multiple external serial port devices using a serial port controller in embedded disk controllers
US7870346B2 (en) 2003-03-10 2011-01-11 Marvell International Ltd. Servo controller interface module for embedded disk controllers
US7290196B1 (en) * 2003-03-21 2007-10-30 Cypress Semiconductor Corporation Cyclical redundancy check using nullifiers
US7424075B2 (en) 2003-07-31 2008-09-09 Crossroads Systems, Inc. Pseudorandom data pattern verifier with automatic synchronization
US7526691B1 (en) 2003-10-15 2009-04-28 Marvell International Ltd. System and method for using TAP controllers
US7139150B2 (en) 2004-02-10 2006-11-21 Marvell International Ltd. Method and system for head position control in embedded disk drive controllers
US7120084B2 (en) 2004-06-14 2006-10-10 Marvell International Ltd. Integrated memory controller
US8166217B2 (en) 2004-06-28 2012-04-24 Marvell International Ltd. System and method for reading and writing data using storage controllers
US7757009B2 (en) 2004-07-19 2010-07-13 Marvell International Ltd. Storage controllers with dynamic WWN storage modules and methods for managing data and connections between a host and a storage device
US9201599B2 (en) 2004-07-19 2015-12-01 Marvell International Ltd. System and method for transmitting data in storage controllers
US8032674B2 (en) * 2004-07-19 2011-10-04 Marvell International Ltd. System and method for controlling buffer memory overflow and underflow conditions in storage controllers
US7386661B2 (en) 2004-10-13 2008-06-10 Marvell International Ltd. Power save module for storage controllers
US7240267B2 (en) 2004-11-08 2007-07-03 Marvell International Ltd. System and method for conducting BIST operations
US7802026B2 (en) 2004-11-15 2010-09-21 Marvell International Ltd. Method and system for processing frames in storage controllers
US7398452B2 (en) * 2004-12-16 2008-07-08 Broadcom Corporation Method and system for determining a signal quality metric in event of a CRC false positive
US7484160B2 (en) * 2005-03-04 2009-01-27 Tellabs Operations, Inc. Systems and methods for delineating a cell in a communications network
US7609468B2 (en) * 2005-04-06 2009-10-27 Marvell International Ltd. Method and system for read gate timing control for storage controllers
KR100726438B1 (ko) * 2005-10-10 2007-06-11 삼성전자주식회사 예비 비트를 이용한 오류 제어 방법 및 장치
KR101203471B1 (ko) * 2006-06-29 2012-11-21 삼성전자주식회사 네트워크 브리지에서 이더넷 프레임을 전달하는 방법 및상기 브리지 장치
KR100928261B1 (ko) * 2007-09-08 2009-11-24 엘지전자 주식회사 비검출 오류 저감을 위한 신호 분할 및 ｃｒｃ 부착 방법
US7492807B1 (en) * 2008-04-07 2009-02-17 International Business Machines Corporation Pseudo-random bit sequence (PRBS) synchronization for interconnects with dual-tap scrambling devices and methods
CN101599811B (zh) * 2008-06-02 2011-04-06 华为技术有限公司 一种数据处理装置,通信设备以及数据处理方法
KR100991957B1 (ko) * 2009-01-20 2010-11-04 주식회사 팬택 광대역 무선통신시스템에서의 스크램블링 코드 생성 장치 및 그 방법
US8804960B2 (en) * 2010-02-22 2014-08-12 International Business Machines Corporation Implementing known scrambling relationship among multiple serial links
US8275922B2 (en) * 2010-02-22 2012-09-25 International Business Machines Corporation Implementing serial link training patterns separated by random data for training a serial link in an interconnect system
KR102461453B1 (ko) 2015-06-10 2022-11-02 삼성전자주식회사 스토리지 장치
JP2017038319A (ja) * 2015-08-13 2017-02-16 富士通株式会社 伝送システム及び伝送装置

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR1582790A (de) * 1968-01-16 1969-10-10
US3648237A (en) * 1969-02-28 1972-03-07 Ibm Apparatus and method for obtaining synchronization of a maximum length pseudorandom sequence
US3753228A (en) * 1971-12-29 1973-08-14 Westinghouse Air Brake Co Synchronizing arrangement for digital data transmission systems
US3914740A (en) * 1973-09-04 1975-10-21 Northern Electric Co Error detector for pseudo-random sequence of digits
CH581930A5 (de) * 1975-02-05 1976-11-15 Europ Handelsges Anst
NL7710503A (nl) * 1977-09-27 1979-03-29 Philips Nv Digitaal transmissiestelsel.
US4383322A (en) * 1980-05-02 1983-05-10 Harris Corporation Combined use of PN sequence for data scrambling and frame synchronization in digital communication systems
JPS60212049A (ja) * 1984-04-06 1985-10-24 Nec Corp フレ−ム同期方式
US4736424A (en) * 1986-09-22 1988-04-05 Rockwell International Corporation Data scrambling apparatus
US4771463A (en) * 1986-12-05 1988-09-13 Siemens Transmission Systems, Inc. Digital scrambling without error multiplication
US5003552A (en) * 1989-11-20 1991-03-26 Unisys Corporation Carrier aided code tracking loop

Also Published As

Publication number Publication date
JPH0380729A (ja) 1991-04-05
US5237593A (en) 1993-08-17
AU5471090A (en) 1990-11-08
GB2233861A (en) 1991-01-16
DE69020641T2 (de) 1995-11-30
JP3049296B2 (ja) 2000-06-05
GB2233861B (en) 1993-09-01
NO901980D0 (no) 1990-05-03
AU633904B2 (en) 1993-02-11
NO303100B1 (no) 1998-05-25
NO901980L (no) 1990-11-05
GB9009932D0 (en) 1990-06-27
EP0397384A1 (de) 1990-11-14
EP0397384B1 (de) 1995-07-05

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Legal Events

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8364 No opposition during term of opposition