DE68924934D1 - Parallelsynchronisationstechnik. - Google Patents

Parallelsynchronisationstechnik.

Info

Publication number
DE68924934D1
DE68924934D1 DE68924934T DE68924934T DE68924934D1 DE 68924934 D1 DE68924934 D1 DE 68924934D1 DE 68924934 T DE68924934 T DE 68924934T DE 68924934 T DE68924934 T DE 68924934T DE 68924934 D1 DE68924934 D1 DE 68924934D1
Authority
DE
Germany
Prior art keywords
synchronization technology
parallel synchronization
parallel
technology
synchronization
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE68924934T
Other languages
English (en)
Other versions
DE68924934T2 (de
Inventor
Harold Stuart Stone
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of DE68924934D1 publication Critical patent/DE68924934D1/de
Application granted granted Critical
Publication of DE68924934T2 publication Critical patent/DE68924934T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/52—Program synchronisation; Mutual exclusion, e.g. by means of semaphores
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30076—Arrangements for executing specific machine instructions to perform miscellaneous control operations, e.g. NOP
    • G06F9/30087—Synchronisation or serialisation instructions

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Multi Processors (AREA)
DE68924934T 1988-07-26 1989-06-27 Parallelsynchronisationstechnik. Expired - Fee Related DE68924934T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/224,846 US4989131A (en) 1988-07-26 1988-07-26 Technique for parallel synchronization

Publications (2)

Publication Number Publication Date
DE68924934D1 true DE68924934D1 (de) 1996-01-11
DE68924934T2 DE68924934T2 (de) 1996-06-13

Family

ID=22842480

Family Applications (1)

Application Number Title Priority Date Filing Date
DE68924934T Expired - Fee Related DE68924934T2 (de) 1988-07-26 1989-06-27 Parallelsynchronisationstechnik.

Country Status (4)

Country Link
US (1) US4989131A (de)
EP (1) EP0352490B1 (de)
JP (1) JPH0241553A (de)
DE (1) DE68924934T2 (de)

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DE68927946T2 (de) * 1988-08-02 1997-10-16 Philips Electronics Nv Verfahren und Vorrichtung für die Synchronisierung von parallelen Prozessoren unter Verwendung einer unscharf definierten Sperre
US5163149A (en) * 1988-11-02 1992-11-10 International Business Machines Corporation Combining switch for reducing accesses to memory and for synchronizing parallel processes
US5276828A (en) * 1989-03-01 1994-01-04 Digital Equipment Corporation Methods of maintaining cache coherence and processor synchronization in a multiprocessor system using send and receive instructions
US5175824A (en) * 1989-05-08 1992-12-29 Trw Inc. Crossbar switch connected modular multiprocessor system with processor timing relationship selected and synchronized to be appropriate for function being performed
US5317734A (en) * 1989-08-29 1994-05-31 North American Philips Corporation Method of synchronizing parallel processors employing channels and compiling method minimizing cross-processor data dependencies
US5239654A (en) * 1989-11-17 1993-08-24 Texas Instruments Incorporated Dual mode SIMD/MIMD processor providing reuse of MIMD instruction memories as data memories when operating in SIMD mode
US6070003A (en) * 1989-11-17 2000-05-30 Texas Instruments Incorporated System and method of memory access in apparatus having plural processors and plural memories
US6038584A (en) * 1989-11-17 2000-03-14 Texas Instruments Incorporated Synchronized MIMD multi-processing system and method of operation
EP0429733B1 (de) * 1989-11-17 1999-04-28 Texas Instruments Incorporated Multiprozessor mit Koordinatenschalter zwischen Prozessoren und Speichern
US5226125A (en) * 1989-11-17 1993-07-06 Keith Balmer Switch matrix having integrated crosspoint logic and method of operation
US5212777A (en) * 1989-11-17 1993-05-18 Texas Instruments Incorporated Multi-processor reconfigurable in single instruction multiple data (SIMD) and multiple instruction multiple data (MIMD) modes and method of operation
US5083265A (en) * 1990-04-17 1992-01-21 President And Fellows Of Harvard College Bulk-synchronous parallel computer
AU657685B2 (en) * 1990-06-14 1995-03-23 Fujitsu Limited A synchronization control system in a parallel computer
US5274782A (en) * 1990-08-27 1993-12-28 International Business Machines Corporation Method and apparatus for dynamic detection and routing of non-uniform traffic in parallel buffered multistage interconnection networks
US6282583B1 (en) * 1991-06-04 2001-08-28 Silicon Graphics, Inc. Method and apparatus for memory access in a matrix processor computer
JPH0520284A (ja) * 1991-07-16 1993-01-29 Matsushita Electric Ind Co Ltd パラレルプロセツサシステム
JPH05324589A (ja) * 1992-03-25 1993-12-07 Nippon Sheet Glass Co Ltd 並列コンピュータ装置および光結合装置
US5522029A (en) * 1993-04-23 1996-05-28 International Business Machines Corporation Fault tolerant rendezvous and semaphore for multiple parallel processors
JP3639319B2 (ja) * 1994-01-25 2005-04-20 富士通株式会社 並列計算機システム，データ転送制御方法および送受信制御装置
DE69519816T2 (de) * 1994-05-03 2001-09-20 Hewlett Packard Co Anordnung mit Duplikat des Cache-Etikettenspeichers
US6704765B1 (en) 1994-12-14 2004-03-09 International Business Machines Corporation System for allocating resources among agent processes
US5706516A (en) * 1995-01-23 1998-01-06 International Business Machines Corporation System for communicating messages among agent processes
US5655080A (en) * 1995-08-14 1997-08-05 International Business Machines Corporation Distributed hash group-by cooperative processing
US6067610A (en) * 1996-07-29 2000-05-23 Motorola, Inc. Method and data processor for synchronizing multiple masters using multi-bit synchronization indicators
US6941410B1 (en) 2000-06-02 2005-09-06 Sun Microsystems, Inc. Virtual heap for a virtual machine
US6934755B1 (en) 2000-06-02 2005-08-23 Sun Microsystems, Inc. System and method for migrating processes on a network
US7577816B2 (en) * 2003-08-18 2009-08-18 Cray Inc. Remote translation mechanism for a multinode system
CA2439137A1 (en) * 2003-08-08 2005-02-08 Ibm Canada Limited - Ibm Canada Limitee Improved scheduling technique for software pipelining
US7421565B1 (en) 2003-08-18 2008-09-02 Cray Inc. Method and apparatus for indirectly addressed vector load-add -store across multi-processors
US8307194B1 (en) 2003-08-18 2012-11-06 Cray Inc. Relaxed memory consistency model
US7543133B1 (en) 2003-08-18 2009-06-02 Cray Inc. Latency tolerant distributed shared memory multiprocessor computer
US7366873B1 (en) 2003-08-18 2008-04-29 Cray, Inc. Indirectly addressed vector load-operate-store method and apparatus
US7743223B2 (en) * 2003-08-18 2010-06-22 Cray Inc. Decoupling of write address from its associated write data in a store to a shared memory in a multiprocessor system
US7334110B1 (en) 2003-08-18 2008-02-19 Cray Inc. Decoupled scalar/vector computer architecture system and method
US7437521B1 (en) * 2003-08-18 2008-10-14 Cray Inc. Multistream processing memory-and barrier-synchronization method and apparatus
US7519771B1 (en) 2003-08-18 2009-04-14 Cray Inc. System and method for processing memory instructions using a forced order queue
US7478769B1 (en) 2005-03-09 2009-01-20 Cray Inc. Method and apparatus for cooling electronic components
US7730350B2 (en) * 2005-04-28 2010-06-01 Hewlett-Packard Development Company, L.P. Method and system of determining the execution point of programs executed in lock step
US8145749B2 (en) * 2008-08-11 2012-03-27 International Business Machines Corporation Data processing in a hybrid computing environment
US7984267B2 (en) * 2008-09-04 2011-07-19 International Business Machines Corporation Message passing module in hybrid computing system starting and sending operation information to service program for accelerator to execute application program
US8141102B2 (en) * 2008-09-04 2012-03-20 International Business Machines Corporation Data processing in a hybrid computing environment
US8230442B2 (en) * 2008-09-05 2012-07-24 International Business Machines Corporation Executing an accelerator application program in a hybrid computing environment
US8527734B2 (en) 2009-01-23 2013-09-03 International Business Machines Corporation Administering registered virtual addresses in a hybrid computing environment including maintaining a watch list of currently registered virtual addresses by an operating system
US9286232B2 (en) * 2009-01-26 2016-03-15 International Business Machines Corporation Administering registered virtual addresses in a hybrid computing environment including maintaining a cache of ranges of currently registered virtual addresses
US8843880B2 (en) * 2009-01-27 2014-09-23 International Business Machines Corporation Software development for a hybrid computing environment
US8255909B2 (en) * 2009-01-28 2012-08-28 International Business Machines Corporation Synchronizing access to resources in a hybrid computing environment
US9170864B2 (en) * 2009-01-29 2015-10-27 International Business Machines Corporation Data processing in a hybrid computing environment
US8001206B2 (en) * 2009-01-29 2011-08-16 International Business Machines Corporation Broadcasting data in a hybrid computing environment
US20100191923A1 (en) * 2009-01-29 2010-07-29 International Business Machines Corporation Data Processing In A Computing Environment
US8010718B2 (en) * 2009-02-03 2011-08-30 International Business Machines Corporation Direct memory access in a hybrid computing environment
US8037217B2 (en) * 2009-04-23 2011-10-11 International Business Machines Corporation Direct memory access in a hybrid computing environment
US8180972B2 (en) 2009-08-07 2012-05-15 International Business Machines Corporation Reducing remote reads of memory in a hybrid computing environment by maintaining remote memory values locally
US9417905B2 (en) * 2010-02-03 2016-08-16 International Business Machines Corporation Terminating an accelerator application program in a hybrid computing environment
US8578132B2 (en) * 2010-03-29 2013-11-05 International Business Machines Corporation Direct injection of data to be transferred in a hybrid computing environment
US9015443B2 (en) 2010-04-30 2015-04-21 International Business Machines Corporation Reducing remote reads of memory in a hybrid computing environment
US8787368B2 (en) * 2010-12-07 2014-07-22 Advanced Micro Devices, Inc. Crossbar switch with primary and secondary pickers
US10089227B1 (en) * 2015-05-06 2018-10-02 American Megatrends, Inc. Systems, devices and methods using a solid state device as a caching medium with a write cache flushing algorithm
US10108344B1 (en) 2015-05-06 2018-10-23 American Megatrends, Inc. Systems, devices and methods using a solid state device as a caching medium with an SSD filtering or SSD pre-fetch algorithm
US10019362B1 (en) 2015-05-06 2018-07-10 American Megatrends, Inc. Systems, devices and methods using solid state devices as a caching medium with adaptive striping and mirroring regions
US10114566B1 (en) 2015-05-07 2018-10-30 American Megatrends, Inc. Systems, devices and methods using a solid state device as a caching medium with a read-modify-write offload algorithm to assist snapshots
US10055354B1 (en) 2015-05-07 2018-08-21 American Megatrends, Inc. Systems, devices and methods using a solid state device as a caching medium with a hashing algorithm to maintain sibling proximity
US10176103B1 (en) 2015-05-07 2019-01-08 American Megatrends, Inc. Systems, devices and methods using a solid state device as a caching medium with a cache replacement algorithm

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US4247892A (en) * 1978-10-12 1981-01-27 Lawrence Patrick N Arrays of machines such as computers
US4257096A (en) * 1978-10-23 1981-03-17 International Business Machines Corporation Synchronous and conditional inter-program control apparatus for a computer system
US4306286A (en) * 1979-06-29 1981-12-15 International Business Machines Corporation Logic simulation machine
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US4395758A (en) * 1979-12-10 1983-07-26 Digital Equipment Corporation Accelerator processor for a data processing system
FR2471631B1 (fr) * 1979-12-11 1986-02-21 Cii Honeywell Bull Dispositif de synchronisation et d'affectation de processus entre plusieurs processeurs dans un systeme de traitement de l'information
US4523273A (en) * 1982-12-23 1985-06-11 Purdue Research Foundation Extra stage cube
US4661900A (en) * 1983-04-25 1987-04-28 Cray Research, Inc. Flexible chaining in vector processor with selective use of vector registers as operand and result registers
US4636942A (en) * 1983-04-25 1987-01-13 Cray Research, Inc. Computer vector multiprocessing control
US4598400A (en) * 1983-05-31 1986-07-01 Thinking Machines Corporation Method and apparatus for routing message packets
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GB8517376D0 (en) * 1985-07-09 1985-08-14 Jesshope C R Processor array

Also Published As

Publication number Publication date
JPH0241553A (ja) 1990-02-09
EP0352490A3 (de) 1992-03-18
EP0352490A2 (de) 1990-01-31
EP0352490B1 (de) 1995-11-29
US4989131A (en) 1991-01-29
DE68924934T2 (de) 1996-06-13

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee