DE68926412D1 - Datenfehler-Detektion und -Korrektur - Google Patents
Datenfehler-Detektion und -KorrekturInfo
- Publication number
- DE68926412D1 DE68926412D1 DE68926412T DE68926412T DE68926412D1 DE 68926412 D1 DE68926412 D1 DE 68926412D1 DE 68926412 T DE68926412 T DE 68926412T DE 68926412 T DE68926412 T DE 68926412T DE 68926412 D1 DE68926412 D1 DE 68926412D1
- Authority
- DE
- Germany
- Prior art keywords
- correction
- error detection
- data error
- data
- detection
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M5/00—Conversion of the form of the representation of individual digits
- H03M5/02—Conversion to or from representation by pulses
- H03M5/16—Conversion to or from representation by pulses the pulses having three levels
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M5/00—Conversion of the form of the representation of individual digits
- H03M5/02—Conversion to or from representation by pulses
- H03M5/20—Conversion to or from representation by pulses the pulses having more than three levels
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
- G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
- G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
- G06F11/1072—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices in multilevel memories
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US07/225,976 US4961192A (en) | 1988-07-29 | 1988-07-29 | Data error detection and correction |
Publications (1)
Publication Number | Publication Date |
---|---|
DE68926412D1 true DE68926412D1 (de) | 1996-06-13 |
Family
ID=22847044
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE68926412T Expired - Lifetime DE68926412D1 (de) | 1988-07-29 | 1989-07-12 | Datenfehler-Detektion und -Korrektur |
Country Status (4)
Country | Link |
---|---|
US (1) | US4961192A (de) |
EP (1) | EP0352937B1 (de) |
JP (1) | JPH0650472B2 (de) |
DE (1) | DE68926412D1 (de) |
Families Citing this family (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5122688A (en) * | 1988-07-29 | 1992-06-16 | International Business Machines Corporation | Trinary check trit generator, latch, comparator and multiplexer |
US5212800A (en) * | 1989-06-20 | 1993-05-18 | Mensch Jr William D | Method and apparatus for sensing trinary logic states in a microcomputer using bus holding circuits |
CA2004436C (en) * | 1989-12-01 | 1999-06-29 | Alain Comeau | Test chip for use in semiconductor fault analysis |
US5423030A (en) * | 1993-09-13 | 1995-06-06 | Unisys Corporation | Bus station abort detection |
NL1000669C2 (nl) * | 1995-06-26 | 1996-12-31 | Nederland Ptt | Werkwijze en inrichtingen voor het overdragen van data met controle op transmissiefouten. |
DE19844666C1 (de) * | 1998-09-29 | 2000-03-30 | Siemens Ag | Decoderelement zur Erzeugung eines Ausgangssignals mit drei unterschiedlichen Potentialen und Betriebsverfahren für das Decoderelement |
JP2000113606A (ja) * | 1998-10-05 | 2000-04-21 | Internatl Business Mach Corp <Ibm> | データ記憶媒体からのリード・データ・エラーの訂正方法および装置 |
JP4505701B2 (ja) * | 2000-10-31 | 2010-07-21 | ソニー株式会社 | 情報処理装置および情報処理方法、プログラム記録媒体 |
JP2003209493A (ja) | 2002-01-11 | 2003-07-25 | Nec Corp | 符号分割多元接続通信方式及び方法 |
GB0214516D0 (en) * | 2002-06-21 | 2002-08-07 | Melexis Nv | Single pin multilevel intergrated circuit test interface |
EP1634699A1 (de) | 2004-09-10 | 2006-03-15 | Syrom 90 S.P.A. | Metallisierter Mehrschichtfilm und Verfahren zur Herstellung |
US7506226B2 (en) * | 2006-05-23 | 2009-03-17 | Micron Technology, Inc. | System and method for more efficiently using error correction codes to facilitate memory device testing |
KR100833600B1 (ko) * | 2006-08-25 | 2008-05-30 | 삼성전자주식회사 | 에러 정정 회로, 그 방법 및 상기 회로를 구비하는 반도체메모리 장치 |
Family Cites Families (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3755779A (en) * | 1971-12-14 | 1973-08-28 | Ibm | Error correction system for single-error correction, related-double-error correction and unrelated-double-error detection |
GB1389551A (en) * | 1972-05-15 | 1975-04-03 | Secr Defence | Multiplex digital telecommunications apparatus having error- correcting facilities |
US4397020A (en) * | 1980-09-11 | 1983-08-02 | Bell Telephone Laboratories, Incorporated | Error monitoring in digital transmission systems |
US4414666A (en) * | 1981-04-30 | 1983-11-08 | National Semiconductor Corporation | Error checking and correcting apparatus |
US4414667A (en) * | 1981-11-27 | 1983-11-08 | Gte Products Corporation | Forward error correcting apparatus |
US4523314A (en) * | 1983-02-07 | 1985-06-11 | Sperry Corporation | Read error occurrence detector for error checking and correcting system |
JPS60142430A (ja) * | 1983-12-28 | 1985-07-27 | Fujitsu Ltd | 誤り訂正・検出装置 |
US4631428A (en) * | 1984-10-26 | 1986-12-23 | International Business Machines Corporation | Communication interface connecting binary logic unit through a trinary logic transmission channel |
-
1988
- 1988-07-29 US US07/225,976 patent/US4961192A/en not_active Expired - Fee Related
-
1989
- 1989-07-12 EP EP89307076A patent/EP0352937B1/de not_active Expired - Lifetime
- 1989-07-12 DE DE68926412T patent/DE68926412D1/de not_active Expired - Lifetime
- 1989-07-19 JP JP1184888A patent/JPH0650472B2/ja not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
JPH03109646A (ja) | 1991-05-09 |
EP0352937A3 (de) | 1991-12-04 |
EP0352937A2 (de) | 1990-01-31 |
EP0352937B1 (de) | 1996-05-08 |
JPH0650472B2 (ja) | 1994-06-29 |
US4961192A (en) | 1990-10-02 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8332 | No legal effect for de |