DE68917896T2 - Integrierte Halbleiterschaltung, fähig ein Ereignis einer fehlerhaften Wirkung wegen Störungen zu verhindern. - Google Patents

Integrierte Halbleiterschaltung, fähig ein Ereignis einer fehlerhaften Wirkung wegen Störungen zu verhindern.

Info

Publication number
DE68917896T2
DE68917896T2 DE68917896T DE68917896T DE68917896T2 DE 68917896 T2 DE68917896 T2 DE 68917896T2 DE 68917896 T DE68917896 T DE 68917896T DE 68917896 T DE68917896 T DE 68917896T DE 68917896 T2 DE68917896 T2 DE 68917896T2
Authority
DE
Germany
Prior art keywords
interference
event
preventing
integrated circuit
semiconductor integrated
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE68917896T
Other languages
English (en)
Other versions
DE68917896D1 (de
Inventor
Nobuaki Intell Propert Ohtsuka
Sumio Intell Property D Tanaka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Publication of DE68917896D1 publication Critical patent/DE68917896D1/de
Application granted granted Critical
Publication of DE68917896T2 publication Critical patent/DE68917896T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G11C16/12—Programming voltage switching circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/22—Safety or protection circuits preventing unauthorised or accidental access to memory cells
    • G11C16/225—Preventing erasure, programming or reading when power supply voltages are outside the required ranges

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Security & Cryptography (AREA)
  • Computer Hardware Design (AREA)
  • Read Only Memory (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Non-Volatile Memory (AREA)
  • Semiconductor Memories (AREA)
  • Logic Circuits (AREA)
  • Static Random-Access Memory (AREA)
DE68917896T 1989-01-13 1989-12-12 Integrierte Halbleiterschaltung, fähig ein Ereignis einer fehlerhaften Wirkung wegen Störungen zu verhindern. Expired - Fee Related DE68917896T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP621889A JPH088334B2 (ja) 1989-01-13 1989-01-13 半導体集積回路

Publications (2)

Publication Number Publication Date
DE68917896D1 DE68917896D1 (de) 1994-10-06
DE68917896T2 true DE68917896T2 (de) 1995-02-02

Family

ID=11632379

Family Applications (1)

Application Number Title Priority Date Filing Date
DE68917896T Expired - Fee Related DE68917896T2 (de) 1989-01-13 1989-12-12 Integrierte Halbleiterschaltung, fähig ein Ereignis einer fehlerhaften Wirkung wegen Störungen zu verhindern.

Country Status (4)

Country Link
EP (1) EP0377841B1 (de)
JP (1) JPH088334B2 (de)
KR (1) KR930007184B1 (de)
DE (1) DE68917896T2 (de)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0598475A3 (de) * 1992-11-17 1995-03-22 Advanced Micro Devices Inc Vorrichtung und Verfahren zum Schutz einer Programmierbaren logischen Schaltung gegen Überspannungen.
US5682496A (en) * 1995-02-10 1997-10-28 Micron Quantum Devices, Inc. Filtered serial event controlled command port for memory
US6108237A (en) 1997-07-17 2000-08-22 Micron Technology, Inc. Fast-sensing amplifier for flash memory
JP4128763B2 (ja) 2000-10-30 2008-07-30 株式会社東芝 電圧切り替え回路
JP4923652B2 (ja) * 2006-03-20 2012-04-25 セイコーエプソン株式会社 半導体装置

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5561357U (de) * 1978-10-23 1980-04-25
JPS62257700A (ja) * 1986-05-02 1987-11-10 Toshiba Corp Ｅｅｐｒｏｍの書込み制御方式
JPS63755A (ja) * 1986-06-20 1988-01-05 Fujitsu Ltd 半導体記憶装置
JPS63246843A (ja) * 1987-04-02 1988-10-13 Toshiba Corp 半導体集積回路装置

Also Published As

Publication number Publication date
DE68917896D1 (de) 1994-10-06
EP0377841A3 (de) 1991-09-18
KR930007184B1 (ko) 1993-07-31
EP0377841A2 (de) 1990-07-18
JPH02186666A (ja) 1990-07-20
EP0377841B1 (de) 1994-08-31
KR910013261A (ko) 1991-08-08
JPH088334B2 (ja) 1996-01-29

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8320 Willingness to grant licences declared (paragraph 23)
8339 Ceased/non-payment of the annual fee