DE68917444T2 - ECL-CMOS-Umsetzer mit einer einzigen Speisespannung. - Google Patents

ECL-CMOS-Umsetzer mit einer einzigen Speisespannung.

Info

Publication number
DE68917444T2
DE68917444T2 DE68917444T DE68917444T DE68917444T2 DE 68917444 T2 DE68917444 T2 DE 68917444T2 DE 68917444 T DE68917444 T DE 68917444T DE 68917444 T DE68917444 T DE 68917444T DE 68917444 T2 DE68917444 T2 DE 68917444T2
Authority
DE
Germany
Prior art keywords
ecl
supply voltage
single supply
cmos converter
cmos
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE68917444T
Other languages
English (en)
Other versions
DE68917444D1 (de
Inventor
Eric Pharr Etheridge
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tektronix Inc
Original Assignee
Tektronix Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tektronix Inc filed Critical Tektronix Inc
Publication of DE68917444D1 publication Critical patent/DE68917444D1/de
Application granted granted Critical
Publication of DE68917444T2 publication Critical patent/DE68917444T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175—Coupling arrangements; Interface arrangements
    • H03K19/0185—Coupling arrangements; Interface arrangements using field effect transistors only
    • H03K19/018507—Interface arrangements
    • H03K19/01855—Interface arrangements synchronous, i.e. using clock signals

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Logic Circuits (AREA)
DE68917444T 1988-12-20 1989-10-18 ECL-CMOS-Umsetzer mit einer einzigen Speisespannung. Expired - Fee Related DE68917444T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/287,826 US4891535A (en) 1988-12-20 1988-12-20 Single supply ECL to CMOS converter

Publications (2)

Publication Number Publication Date
DE68917444D1 DE68917444D1 (de) 1994-09-15
DE68917444T2 true DE68917444T2 (de) 1995-05-04

Family

ID=23104525

Family Applications (1)

Application Number Title Priority Date Filing Date
DE68917444T Expired - Fee Related DE68917444T2 (de) 1988-12-20 1989-10-18 ECL-CMOS-Umsetzer mit einer einzigen Speisespannung.

Country Status (4)

Country Link
US (1) US4891535A (de)
EP (1) EP0375123B1 (de)
JP (1) JPH0795679B2 (de)
DE (1) DE68917444T2 (de)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01265718A (ja) * 1988-04-18 1989-10-23 Toshiba Corp シュミットトリガ回路
JP2549729B2 (ja) * 1989-04-26 1996-10-30 株式会社東芝 半導体集積回路
US5160859A (en) * 1990-10-22 1992-11-03 National Semiconductor Corporation Synchronous internal clock distribution
US5155391A (en) * 1990-10-22 1992-10-13 National Semiconductor Corporation Synchronous internal clock distribution
US5450024A (en) * 1994-01-19 1995-09-12 Alcatel Network Systems, Inc. ECL to CMOS signal converter circuit including toggle-fault detection
US6211699B1 (en) 1999-04-14 2001-04-03 Micro Linear Corporation High performance CML to CMOS converter
JP3252830B2 (ja) * 1999-05-28 2002-02-04 日本電気株式会社 レベル変換回路
CH695956A5 (fr) 2001-04-02 2006-10-31 Agabekov Sa Elément d'éclairage.
KR100933677B1 (ko) * 2008-04-30 2009-12-23 주식회사 하이닉스반도체 반도체 소자

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0101571B1 (de) * 1982-07-30 1987-01-28 Kabushiki Kaisha Toshiba Spannungsdifferenz-Verstärker
JPS60173922A (ja) * 1984-02-17 1985-09-07 Fujitsu Ltd 変換回路
JPH0644705B2 (ja) * 1984-07-20 1994-06-08 株式会社日立製作所 半導体回路
CA1241707A (en) * 1985-02-13 1988-09-06 John G. Hogeboom Digital line receiver
US4719372A (en) * 1986-02-03 1988-01-12 International Business Machines Corporation Multiplying interface circuit for level shifting between FET and TTL levels
US4810908A (en) * 1986-12-01 1989-03-07 Hirokazu Suzuki Semiconductor logic circuit comprising clock driver and clocked logic circuit
US4700087A (en) * 1986-12-23 1987-10-13 Tektronix, Inc. Logic signal level conversion circuit
US4761567A (en) * 1987-05-20 1988-08-02 Advanced Micro Devices, Inc. Clock scheme for VLSI systems
US4767951A (en) * 1987-06-30 1988-08-30 Hewlett-Packard Company ECL to NMOS converter
US4849659A (en) * 1987-12-15 1989-07-18 North American Philips Corporation, Signetics Division Emitter-coupled logic circuit with three-state capability

Also Published As

Publication number Publication date
JPH02224414A (ja) 1990-09-06
EP0375123A3 (en) 1990-12-05
DE68917444D1 (de) 1994-09-15
US4891535A (en) 1990-01-02
JPH0795679B2 (ja) 1995-10-11
EP0375123A2 (de) 1990-06-27
EP0375123B1 (de) 1994-08-10

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee