DE60227736D1 - Verfahren zum Herstellen einer Dual-Damascene-Struktur - Google Patents

Verfahren zum Herstellen einer Dual-Damascene-Struktur

Info

Publication number
DE60227736D1
DE60227736D1 DE60227736T DE60227736T DE60227736D1 DE 60227736 D1 DE60227736 D1 DE 60227736D1 DE 60227736 T DE60227736 T DE 60227736T DE 60227736 T DE60227736 T DE 60227736T DE 60227736 D1 DE60227736 D1 DE 60227736D1
Authority
DE
Germany
Prior art keywords
producing
dual damascene
damascene structure
dual
damascene
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60227736T
Other languages
English (en)
Inventor
Atsushi Shiota
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
JSR Corp
Original Assignee
JSR Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by JSR Corp filed Critical JSR Corp
Application granted granted Critical
Publication of DE60227736D1 publication Critical patent/DE60227736D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76835—Combinations of two or more different dielectric layers having a low dielectric constant
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02118—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer carbon based polymeric organic or inorganic material, e.g. polyimides, poly cyclobutene or PVC
    • H01L21/0212—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer carbon based polymeric organic or inorganic material, e.g. polyimides, poly cyclobutene or PVC the material being fluoro carbon compounds, e.g.(CFx) n, (CHxFy) n or polytetrafluoroethylene
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02126—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/022—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being a laminate, i.e. composed of sublayers, e.g. stacks of alternating high-k metal oxides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02205—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition
    • H01L21/02208—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si
    • H01L21/02214—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si the compound comprising silicon and oxygen
    • H01L21/02216—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si the compound comprising silicon and oxygen the compound being a molecule comprising at least one silicon-oxygen bond and the compound having hydrogen or an organic group attached to the silicon or oxygen, e.g. a siloxane
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02282—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process liquid deposition, e.g. spin-coating, sol-gel techniques, spray coating
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
    • H01L21/02318—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment
    • H01L21/02337—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment treatment by exposure to a gas or vapour
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
    • H01L21/02318—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment
    • H01L21/02345—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment treatment by exposure to radiation, e.g. visible light
    • H01L21/02348—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment treatment by exposure to radiation, e.g. visible light treatment by exposure to UV light
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/312—Organic layers, e.g. photoresist
    • H01L21/3121—Layers comprising organo-silicon compounds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/312—Organic layers, e.g. photoresist
    • H01L21/3127—Layers comprising fluoro (hydro)carbon compounds, e.g. polytetrafluoroethylene
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/314—Inorganic layers
    • H01L21/316—Inorganic layers composed of oxides or glassy oxides or oxide based glass
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
    • H01L21/76807—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics for dual damascene structures
    • H01L21/76811—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics for dual damascene structures involving multiple stacked pre-patterned masks
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76829—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Spectroscopy & Molecular Physics (AREA)
  • Formation Of Insulating Films (AREA)
  • Paints Or Removers (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
DE60227736T 2001-03-30 2002-03-28 Verfahren zum Herstellen einer Dual-Damascene-Struktur Expired - Lifetime DE60227736D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2001101186A JP2002299441A (ja) 2001-03-30 2001-03-30 デュアルダマシン構造の形成方法

Publications (1)

Publication Number Publication Date
DE60227736D1 true DE60227736D1 (de) 2008-09-04

Family

ID=18954542

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60227736T Expired - Lifetime DE60227736D1 (de) 2001-03-30 2002-03-28 Verfahren zum Herstellen einer Dual-Damascene-Struktur

Country Status (6)

Country Link
US (1) US20020142586A1 (de)
EP (1) EP1246239B1 (de)
JP (1) JP2002299441A (de)
KR (1) KR100822138B1 (de)
DE (1) DE60227736D1 (de)
TW (1) TW586204B (de)

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EP1298176B1 (de) * 2001-09-28 2007-01-03 JSR Corporation Gestapelte Schicht, isolierender Film und Substrate für Halbleiter
TWI258635B (en) 2002-11-27 2006-07-21 Tokyo Ohka Kogyo Co Ltd Undercoating material for wiring, embedded material, and wiring formation method
TW200505966A (en) * 2003-04-02 2005-02-16 Dow Global Technologies Inc Organosilicate resin formulation for use in microelectronic devices
TW200428586A (en) * 2003-04-08 2004-12-16 Matsushita Electric Ind Co Ltd Electronic device and the manufacturing method thereof
US7345351B2 (en) * 2003-04-09 2008-03-18 Lg Chem, Ltd. Coating composition for insulating film production, preparation method of insulation film by using the same, insulation film for semi-conductor device prepared therefrom, and semi-conductor device comprising the same
JP2004356582A (ja) * 2003-05-30 2004-12-16 Asahi Glass Co Ltd 積層体
KR100583957B1 (ko) * 2003-12-03 2006-05-26 삼성전자주식회사 희생금속산화막을 채택하여 이중다마신 금속배선을형성하는 방법
US20050196535A1 (en) * 2004-03-02 2005-09-08 Weigel Scott J. Solvents and methods using same for removing silicon-containing residues from a substrate
WO2005114724A1 (ja) * 2004-05-21 2005-12-01 Jsr Corporation 積層体および半導体装置
US7285501B2 (en) * 2004-09-17 2007-10-23 Hewlett-Packard Development Company, L.P. Method of forming a solution processed device
WO2006058150A2 (en) * 2004-11-23 2006-06-01 Massachusetts Institute Of Technology Multilevel fabrication processing by functional regrouping of material deposition, lithography, and etching
US20060176683A1 (en) * 2005-02-08 2006-08-10 Chen-Cheng Chien Outdoor light
US7910283B2 (en) * 2005-11-21 2011-03-22 Shin-Etsu Chemical Co., Ltd. Silicon-containing antireflective coating forming composition, silicon-containing antireflective coating, substrate processing intermediate, and substrate processing method
KR100802226B1 (ko) * 2006-12-21 2008-02-11 주식회사 하이닉스반도체 듀얼 다마신 패턴 형성 방법
US8653217B2 (en) 2007-05-01 2014-02-18 Dow Corning Corporation Method for forming anti-reflective coating
JP2009123880A (ja) * 2007-11-14 2009-06-04 Showa Denko Kk 研磨組成物
US7981308B2 (en) 2007-12-31 2011-07-19 Robert Bosch Gmbh Method of etching a device using a hard mask and etch stop layer
KR100930672B1 (ko) * 2008-01-11 2009-12-09 제일모직주식회사 실리콘계 하드마스크 조성물 및 이를 이용한 반도체집적회로 디바이스의 제조방법
US9023433B2 (en) * 2008-01-15 2015-05-05 Dow Corning Corporation Silsesquioxane resins and method of using them to form an antireflective coating
KR20110096063A (ko) * 2008-12-10 2011-08-26 다우 코닝 코포레이션 실세스퀴옥산 수지
JP5462603B2 (ja) * 2009-11-26 2014-04-02 宇部エクシモ株式会社 素子分離材料用塗布液、素子分離材料用塗布液の作製方法、素子分離層用薄膜、素子分離層用薄膜の形成方法、基板、及び、基板の形成方法
US8703625B2 (en) 2010-02-04 2014-04-22 Air Products And Chemicals, Inc. Methods to prepare silicon-containing films
EP2363512A1 (de) * 2010-02-04 2011-09-07 Air Products And Chemicals, Inc. Verfahren zur Herstellung von siliciumhaltigen Schichten
JP5663959B2 (ja) * 2010-05-28 2015-02-04 Jsr株式会社 絶縁パターン形成方法及びダマシンプロセス用絶縁パターン形成材料
US9269563B2 (en) * 2014-06-06 2016-02-23 Applied Materials, Inc. Methods for forming interconnect structure utilizing selective protection process for hardmask removal process
JP5835425B2 (ja) * 2014-07-10 2015-12-24 Jsr株式会社 ダマシンプロセス用絶縁パターン形成材料
CN113838798B (zh) * 2020-06-08 2024-05-17 芯恩（青岛）集成电路有限公司 一种刻蚀方法

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US6235353B1 (en) * 1998-02-24 2001-05-22 Alliedsignal Inc. Low dielectric constant films with high glass transition temperatures made by electron beam curing
US6265779B1 (en) * 1998-08-11 2001-07-24 International Business Machines Corporation Method and material for integration of fuorine-containing low-k dielectrics
US6475904B2 (en) * 1998-12-03 2002-11-05 Advanced Micro Devices, Inc. Interconnect structure with silicon containing alicyclic polymers and low-k dielectric materials and method of making same with single and dual damascene techniques
JP4460669B2 (ja) * 1999-03-19 2010-05-12 株式会社東芝 半導体装置
US6770975B2 (en) * 1999-06-09 2004-08-03 Alliedsignal Inc. Integrated circuits with multiple low dielectric-constant inter-metal dielectrics
US6498399B2 (en) * 1999-09-08 2002-12-24 Alliedsignal Inc. Low dielectric-constant dielectric for etchstop in dual damascene backend of integrated circuits
US6558747B2 (en) * 1999-09-29 2003-05-06 Kabushiki Kaisha Toshiba Method of forming insulating film and process for producing semiconductor device
US6451683B1 (en) * 2000-08-28 2002-09-17 Micron Technology, Inc. Damascene structure and method of making

Also Published As

Publication number Publication date
US20020142586A1 (en) 2002-10-03
JP2002299441A (ja) 2002-10-11
TW586204B (en) 2004-05-01
KR20020077174A (ko) 2002-10-11
EP1246239B1 (de) 2008-07-23
KR100822138B1 (ko) 2008-04-15
EP1246239A1 (de) 2002-10-02

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