DE60219527T8 - Takterzeugungsschaltung - Google Patents

Takterzeugungsschaltung Download PDF

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Publication number
DE60219527T8
DE60219527T8 DE60219527T DE60219527T DE60219527T8 DE 60219527 T8 DE60219527 T8 DE 60219527T8 DE 60219527 T DE60219527 T DE 60219527T DE 60219527 T DE60219527 T DE 60219527T DE 60219527 T8 DE60219527 T8 DE 60219527T8
Authority
DE
Germany
Prior art keywords
generation circuit
clock generation
clock
circuit
generation
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
DE60219527T
Other languages
English (en)
Other versions
DE60219527D1 (de
DE60219527T2 (de
Inventor
Akira Chiyoda-ku TAKAHASHI
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Publication of DE60219527D1 publication Critical patent/DE60219527D1/de
Application granted granted Critical
Publication of DE60219527T2 publication Critical patent/DE60219527T2/de
Publication of DE60219527T8 publication Critical patent/DE60219527T8/de
Active legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • H03L7/081Details of the phase-locked loop provided with an additional controlled phase shifter
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/07Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop using several loops, e.g. for redundant clock signal generation
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • H03L7/081Details of the phase-locked loop provided with an additional controlled phase shifter
    • H03L7/0812Details of the phase-locked loop provided with an additional controlled phase shifter and where no voltage or current controlled oscillator is used
    • H03L7/0814Details of the phase-locked loop provided with an additional controlled phase shifter and where no voltage or current controlled oscillator is used the phase shifting device being digitally controlled
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • H03L7/085Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/087Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal using at least two phase detectors or a frequency and phase detector in the loop
DE60219527T 2002-01-16 2002-01-16 Takterzeugungsschaltung Active DE60219527T8 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/JP2002/000233 WO2003061129A1 (fr) 2002-01-16 2002-01-16 Circuit generateur d'impulsions

Publications (3)

Publication Number Publication Date
DE60219527D1 DE60219527D1 (de) 2007-05-24
DE60219527T2 DE60219527T2 (de) 2007-12-27
DE60219527T8 true DE60219527T8 (de) 2008-04-10

Family

ID=11738130

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60219527T Active DE60219527T8 (de) 2002-01-16 2002-01-16 Takterzeugungsschaltung

Country Status (5)

Country Link
US (1) US7088155B2 (de)
EP (1) EP1467488B1 (de)
JP (1) JP3810408B2 (de)
DE (1) DE60219527T8 (de)
WO (1) WO2003061129A1 (de)

Families Citing this family (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
AU2002321951A1 (en) * 2002-08-30 2004-03-19 Telefonaktiebolaget Lm Ericsson (Publ) Method and arrangement for reducing phase jumps when switching between synchronisation sources
KR100533915B1 (ko) * 2003-10-21 2005-12-06 한국전자통신연구원 클럭 신호의 연속성을 보장하는 클럭 신호 선택 장치 및방법
US7747237B2 (en) * 2004-04-09 2010-06-29 Skyworks Solutions, Inc. High agility frequency synthesizer phase-locked loop
US7522690B2 (en) * 2004-09-15 2009-04-21 Silicon Laboratories Inc. Jitter self test
TWI316793B (en) * 2006-06-28 2009-11-01 Realtek Semiconductor Corp Frequency synthesizer with a plurality of frequency locking circuits
KR100815187B1 (ko) * 2006-08-31 2008-03-19 주식회사 하이닉스반도체 반도체 메모리 장치
TWI332318B (en) * 2006-09-07 2010-10-21 Realtek Semiconductor Corp Multiloop phase locked loop circuit
TWI427458B (zh) * 2006-11-30 2014-02-21 Semiconductor Energy Lab 時脈產生電路以及具有時脈產生電路之半導體裝置
KR100955675B1 (ko) * 2007-08-23 2010-05-06 주식회사 하이닉스반도체 클럭 펄스 발생 회로
FR2920928A1 (fr) 2007-09-07 2009-03-13 Thomson Licensing Sas Reduction de duree d'accrochage d'une boucle a verrouillage de phase apte a reconstituer un signal de synchronisation transmis sur un reseau ip.
US7902886B2 (en) * 2007-10-30 2011-03-08 Diablo Technologies Inc. Multiple reference phase locked loop
US8077822B2 (en) * 2008-04-29 2011-12-13 Qualcomm Incorporated System and method of controlling power consumption in a digital phase locked loop (DPLL)
JP2010074201A (ja) * 2008-09-16 2010-04-02 Nec Electronics Corp 同期検出回路、これを用いたパルス幅変調回路、及び同期検出方法
US7893736B2 (en) * 2008-11-14 2011-02-22 Analog Devices, Inc. Multiple input PLL with hitless switchover between non-integer related input frequencies
US7924072B2 (en) 2008-11-14 2011-04-12 Analog Devices, Inc. Exact frequency translation using dual cascaded sigma-delta modulator controlled phase lock loops
US7924966B2 (en) 2008-11-21 2011-04-12 Analog Devices, Inc. Symmetry corrected high frequency digital divider
WO2012127487A1 (en) * 2011-03-23 2012-09-27 Tejas Network Limited An apparatus for glitch-free clock switching and a method thereof
CN208337594U (zh) * 2018-06-21 2019-01-04 新港海岸(北京)科技有限公司 一种时钟无损切换系统
US10541689B1 (en) * 2018-07-06 2020-01-21 M31 Technology Corporation Clock generation circuit and associated circuitry
US10623174B1 (en) * 2018-12-12 2020-04-14 Xilinx, Inc. Low latency data transfer technique for mesochronous divided clocks
JP7393079B2 (ja) * 2019-03-26 2023-12-06 ラピスセミコンダクタ株式会社 半導体装置
US11039517B2 (en) * 2019-04-01 2021-06-15 Sct Ltd. Fraction PWM with multiple phase display clock

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04113718A (ja) * 1990-09-04 1992-04-15 Fujitsu Ltd ヒットレス・クロック切替装置
JPH06232739A (ja) 1993-02-05 1994-08-19 Toshiba Corp クロック冗長化方式
JP3036402B2 (ja) 1994-05-18 2000-04-24 日本電気株式会社 Pll制御装置
JPH0818447A (ja) 1994-06-28 1996-01-19 Mitsubishi Electric Corp Pll回路装置
US5748569A (en) * 1996-12-19 1998-05-05 Dsc Telecom L.P. Apparatus and method for clock alignment and switching
JPH10290158A (ja) * 1997-04-15 1998-10-27 Saitama Nippon Denki Kk 二重化位相同期装置
JP3720996B2 (ja) 1998-02-27 2005-11-30 株式会社東芝 クロック切替装置
JP3132657B2 (ja) 1998-04-15 2001-02-05 日本電気株式会社 クロック切替回路
JP2000148281A (ja) * 1998-11-12 2000-05-26 Nec Commun Syst Ltd クロック選択回路
JP2001077690A (ja) 1999-09-06 2001-03-23 Matsushita Electric Ind Co Ltd クロック供給装置及び方法
JP2001251182A (ja) * 1999-12-28 2001-09-14 Sony Corp 基準波切り換え装置および通信装置、並びに、デジタル放送システムおよび方法
GB2363268B (en) * 2000-06-08 2004-04-14 Mitel Corp Timing circuit with dual phase locked loops
JP3531630B2 (ja) * 2001-08-07 2004-05-31 日本電気株式会社 クロック生成回路

Also Published As

Publication number Publication date
DE60219527D1 (de) 2007-05-24
US7088155B2 (en) 2006-08-08
EP1467488A4 (de) 2005-04-27
US20050062505A1 (en) 2005-03-24
DE60219527T2 (de) 2007-12-27
EP1467488A1 (de) 2004-10-13
JP3810408B2 (ja) 2006-08-16
WO2003061129A1 (fr) 2003-07-24
JPWO2003061129A1 (ja) 2005-05-19
EP1467488B1 (de) 2007-04-11

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Legal Events

Date Code Title Description
8320 Willingness to grant licences declared (paragraph 23)