DE602007008614D1 - Dmac zum abwicklen von transfers unbekannter länge - Google Patents

Dmac zum abwicklen von transfers unbekannter länge

Info

Publication number
DE602007008614D1
DE602007008614D1 DE602007008614T DE602007008614T DE602007008614D1 DE 602007008614 D1 DE602007008614 D1 DE 602007008614D1 DE 602007008614 T DE602007008614 T DE 602007008614T DE 602007008614 T DE602007008614 T DE 602007008614T DE 602007008614 D1 DE602007008614 D1 DE 602007008614D1
Authority
DE
Germany
Prior art keywords
dma
data count
transferred data
transferred
register
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
DE602007008614T
Other languages
English (en)
Inventor
David Barrow
Patricia Roberts
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Telefonaktiebolaget LM Ericsson AB
Original Assignee
Telefonaktiebolaget LM Ericsson AB
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Telefonaktiebolaget LM Ericsson AB filed Critical Telefonaktiebolaget LM Ericsson AB
Publication of DE602007008614D1 publication Critical patent/DE602007008614D1/de
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/28—Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access DMA, cycle steal
DE602007008614T 2006-11-28 2007-11-23 Dmac zum abwicklen von transfers unbekannter länge Active DE602007008614D1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US11/563,732 US7433977B2 (en) 2006-11-28 2006-11-28 DMAC to handle transfers of unknown lengths
PCT/EP2007/062728 WO2008065045A2 (en) 2006-11-28 2007-11-23 Dmac to handle transfers of unknown lengths data

Publications (1)

Publication Number Publication Date
DE602007008614D1 true DE602007008614D1 (de) 2010-09-30

Family

ID=38055494

Family Applications (1)

Application Number Title Priority Date Filing Date
DE602007008614T Active DE602007008614D1 (de) 2006-11-28 2007-11-23 Dmac zum abwicklen von transfers unbekannter länge

Country Status (8)

Country Link
US (1) US7433977B2 (de)
EP (1) EP2097828B1 (de)
CN (1) CN101636721B (de)
AT (1) ATE478385T1 (de)
DE (1) DE602007008614D1 (de)
ES (1) ES2349488T3 (de)
TW (1) TW200842592A (de)
WO (1) WO2008065045A2 (de)

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7831746B2 (en) * 2007-03-13 2010-11-09 Sgi International, Inc. Direct memory access engine for data transfers
US8166212B2 (en) * 2007-06-26 2012-04-24 Xerox Corporation Predictive DMA data transfer
DE102007029833B4 (de) * 2007-06-28 2019-03-28 Texas Instruments Deutschland Gmbh Mikrocontroller mit Datenmodifikationsmodul und System umfassend ein Datenmodifikationsmodul
US20090089515A1 (en) * 2007-10-02 2009-04-02 Qualcomm Incorporated Memory Controller for Performing Memory Block Initialization and Copy
US8904058B2 (en) * 2011-05-27 2014-12-02 International Business Machines Corporation Selecting direct memory access engines in an adaptor input/output (I/O) requests received at the adaptor
WO2013095461A1 (en) * 2011-12-21 2013-06-27 Intel Corporation Secure direct memory access
US9430563B2 (en) 2012-02-02 2016-08-30 Xerox Corporation Document processing employing probabilistic topic modeling of documents represented as text words transformed to a continuous space
CN103514126B (zh) * 2012-06-26 2016-07-20 京信通信系统（广州）有限公司 一种数据的接收方法、系统以及装置
US9727502B2 (en) 2013-07-26 2017-08-08 Infineon Technologies Ag System and method for direct memory access transfers
DE102013016114B3 (de) * 2013-09-26 2015-02-05 Infineon Technologies Ag Bussystem und Verfahren für geschützte Speicherzugriffe
CN104717433A (zh) * 2015-03-27 2015-06-17 电子科技大学 一种用于视频流信号处理系统的分布式传输装置
US10877911B1 (en) * 2016-03-30 2020-12-29 Amazon Technologies, Inc. Pattern generation using a direct memory access engine
FR3094507A1 (fr) 2019-03-29 2020-10-02 Stmicroelectronics (Grenoble 2) Sas Accès direct en mémoire
US11099966B2 (en) * 2020-01-09 2021-08-24 International Business Machines Corporation Efficient generation of instrumentation data for direct memory access operations
US11620246B1 (en) * 2022-05-24 2023-04-04 Ambiq Micro, Inc. Enhanced peripheral processing system to optimize power consumption

Family Cites Families (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5151999A (en) 1986-03-31 1992-09-29 Wang Laboratories, Inc. Serial communications controller for transfer of successive data frames with storage of supplemental data and word counts
US4942515A (en) 1986-03-31 1990-07-17 Wang Laboratories, Inc. Serial communications controller with FIFO register for storing supplemental data and counter for counting number of words within each transferred frame
JP2520905B2 (ja) 1987-05-27 1996-07-31 株式会社日立製作所 シリアル通信制御装置
JP2528879B2 (ja) 1987-05-27 1996-08-28 株式会社日立製作所 通信処理装置
CA2022073A1 (en) 1989-10-11 1991-04-12 Arthur Jacob Heimsoth Apparatus and method for receiving serial communication status data with a dma controller
US5333294A (en) * 1990-10-09 1994-07-26 Compaq Computer Corporation Configurable data width direct memory access device with a read address counter and a write address counter which increments the addresses based on the desired data transfer width
US5828856A (en) * 1994-01-28 1998-10-27 Apple Computer, Inc. Dual bus concurrent multi-channel direct memory access controller and method
US5568614A (en) 1994-07-29 1996-10-22 International Business Machines Corporation Data streaming between peer subsystems of a computer system
US5761453A (en) * 1995-12-07 1998-06-02 Apple Computer, Inc. Method and system for increasing the throughput of serial data in a computer system
US6154793A (en) * 1997-04-30 2000-11-28 Zilog, Inc. DMA with dynamically assigned channels, flexible block boundary notification and recording, type code checking and updating, commands, and status reporting
US6275948B1 (en) * 1997-11-14 2001-08-14 Agere Systems Guardian Corp. Processor powerdown operation using intermittent bursts of instruction clock
US6199121B1 (en) * 1998-08-07 2001-03-06 Oak Technology, Inc. High speed dynamic chaining of DMA operations without suspending a DMA controller or incurring race conditions
US6253261B1 (en) 1998-10-21 2001-06-26 3Dlabs Inc., Ltd. System and method for direct memory access in a computer system
US6629164B1 (en) 1999-11-10 2003-09-30 Digi International Inc. Character counter and match registers in a serial interface
US6658503B1 (en) 1999-12-07 2003-12-02 Texas Instruments Incorporated Parallel transfer size calculation and annulment determination in transfer controller with hub and ports
US6622183B1 (en) * 2000-03-21 2003-09-16 Lsi Logic Corporation Data transmission buffer having frame counter feedback for re-transmitting aborted data frames
JP2002073527A (ja) * 2000-08-25 2002-03-12 Rohm Co Ltd Ｄｍａコントローラ
JP2003114864A (ja) * 2001-10-04 2003-04-18 Hitachi Ltd データ転送制御回路
JP2003141057A (ja) 2001-11-06 2003-05-16 Mitsubishi Electric Corp Ｄｍａ転送制御回路
JP4749657B2 (ja) * 2003-03-20 2011-08-17 パナソニック株式会社 Ｄｍａ制御装置

Also Published As

Publication number Publication date
EP2097828A2 (de) 2009-09-09
US20080126612A1 (en) 2008-05-29
WO2008065045A2 (en) 2008-06-05
CN101636721B (zh) 2011-10-26
TW200842592A (en) 2008-11-01
CN101636721A (zh) 2010-01-27
WO2008065045A3 (en) 2008-08-07
US7433977B2 (en) 2008-10-07
EP2097828B1 (de) 2010-08-18
ATE478385T1 (de) 2010-09-15
ES2349488T3 (es) 2011-01-04

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