DE602006002137D1 - Mikroplättchengrosse Abdeckungskappe und deren Anfertigung - Google Patents

Mikroplättchengrosse Abdeckungskappe und deren Anfertigung

Info

Publication number
DE602006002137D1
DE602006002137D1 DE602006002137T DE602006002137T DE602006002137D1 DE 602006002137 D1 DE602006002137 D1 DE 602006002137D1 DE 602006002137 T DE602006002137 T DE 602006002137T DE 602006002137 T DE602006002137 T DE 602006002137T DE 602006002137 D1 DE602006002137 D1 DE 602006002137D1
Authority
DE
Germany
Prior art keywords
microplate
preparation
cover cap
sized cover
sized
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE602006002137T
Other languages
English (en)
Inventor
Moon-Chul Lee
Woon-Bae Kim
Kae-Dong Back
Qian Wang
Jun-Sik Hwang
Kyu-Dong Jung
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Samsung Electronics Co Ltd
Original Assignee
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Publication of DE602006002137D1 publication Critical patent/DE602006002137D1/de
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • BPERFORMING OPERATIONS; TRANSPORTING
    • B81MICROSTRUCTURAL TECHNOLOGY
    • B81CPROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
    • B81C1/00Manufacture or treatment of devices or systems in or on a substrate
    • B81C1/00015Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems
    • B81C1/00261Processes for packaging MEMS devices
    • B81C1/00301Connecting electric signal lines from the MEMS device with external electrical signal lines, e.g. through vias
    • AHUMAN NECESSITIES
    • A47FURNITURE; DOMESTIC ARTICLES OR APPLIANCES; COFFEE MILLS; SPICE MILLS; SUCTION CLEANERS IN GENERAL
    • A47GHOUSEHOLD OR TABLE EQUIPMENT
    • A47G25/00Household implements used in connection with wearing apparel; Dress, hat or umbrella holders
    • A47G25/12Cane or umbrella stands or holders
    • AHUMAN NECESSITIES
    • A47FURNITURE; DOMESTIC ARTICLES OR APPLIANCES; COFFEE MILLS; SPICE MILLS; SUCTION CLEANERS IN GENERAL
    • A47BTABLES; DESKS; OFFICE FURNITURE; CABINETS; DRAWERS; GENERAL DETAILS OF FURNITURE
    • A47B61/00Wardrobes
    • A47B61/04Wardrobes for shoes, hats, umbrellas, or the like
    • AHUMAN NECESSITIES
    • A47FURNITURE; DOMESTIC ARTICLES OR APPLIANCES; COFFEE MILLS; SPICE MILLS; SUCTION CLEANERS IN GENERAL
    • A47GHOUSEHOLD OR TABLE EQUIPMENT
    • A47G25/00Household implements used in connection with wearing apparel; Dress, hat or umbrella holders
    • A47G25/02Dress holders; Dress suspending devices; Clothes-hanger assemblies; Clothing lifters
    • A47G25/06Clothes hooks; Clothes racks; Garment-supporting stands with swingable or extending arms
    • A47G25/0607Clothes hooks
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76898Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics formed through a semiconductor substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/02Containers; Seals
    • H01L23/04Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/02Containers; Seals
    • H01L23/10Containers; Seals characterised by the material or arrangement of seals between parts, e.g. between cap and base of the container or between leads and walls of the container
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/481Internal lead connections, e.g. via connections, feedthrough structures
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B81MICROSTRUCTURAL TECHNOLOGY
    • B81BMICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
    • B81B2207/00Microstructural systems or auxiliary parts thereof
    • B81B2207/09Packages
    • B81B2207/091Arrangements for connecting external electrical signals to mechanical structures inside the package
    • B81B2207/094Feed-through, via
    • B81B2207/095Feed-through, via through the lid
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Micromachines (AREA)
DE602006002137T 2005-02-04 2006-01-12 Mikroplättchengrosse Abdeckungskappe und deren Anfertigung Expired - Fee Related DE602006002137D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1020050010647A KR100594952B1 (ko) 2005-02-04 2005-02-04 웨이퍼 레벨 패키징 캡 및 그 제조방법

Publications (1)

Publication Number Publication Date
DE602006002137D1 true DE602006002137D1 (de) 2008-09-25

Family

ID=36143359

Family Applications (1)

Application Number Title Priority Date Filing Date
DE602006002137T Expired - Fee Related DE602006002137D1 (de) 2005-02-04 2006-01-12 Mikroplättchengrosse Abdeckungskappe und deren Anfertigung

Country Status (5)

Country Link
US (1) US7579685B2 (de)
EP (1) EP1688994B1 (de)
JP (1) JP2006216963A (de)
KR (1) KR100594952B1 (de)
DE (1) DE602006002137D1 (de)

Families Citing this family (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101177885B1 (ko) 2006-01-16 2012-08-28 삼성전자주식회사 웨이퍼 레벨 패키징 캡 및 그 제조방법
KR100831405B1 (ko) * 2006-10-02 2008-05-21 (주) 파이오닉스 웨이퍼 본딩 패키징 방법
EP1932804B1 (de) * 2006-12-11 2017-03-22 Mimotec S.A. Silizium-Metall-Mischteile und damit verbundene Herstellungsverfahren
SE533579C2 (sv) * 2007-01-25 2010-10-26 Silex Microsystems Ab Metod för mikrokapsling och mikrokapslar
KR100872404B1 (ko) 2007-04-26 2008-12-05 (주) 파이오닉스 웨이퍼 본딩 패키징 방법
US20090194861A1 (en) * 2008-02-04 2009-08-06 Mathias Bonse Hermetically-packaged devices, and methods for hermetically packaging at least one device at the wafer level
TWI388038B (zh) * 2009-07-23 2013-03-01 Ind Tech Res Inst 感測元件結構與製造方法
US9570398B2 (en) * 2012-05-18 2017-02-14 Xintec Inc. Chip package and method for forming the same
US9334158B2 (en) * 2012-05-22 2016-05-10 Xintec Inc. Chip package and method for forming the same
US9355997B2 (en) 2014-03-12 2016-05-31 Invensas Corporation Integrated circuit assemblies with reinforcement frames, and methods of manufacture
US20150262902A1 (en) 2014-03-12 2015-09-17 Invensas Corporation Integrated circuits protected by substrates with cavities, and methods of manufacture
US9165793B1 (en) 2014-05-02 2015-10-20 Invensas Corporation Making electrical components in handle wafers of integrated circuit packages
US9741649B2 (en) 2014-06-04 2017-08-22 Invensas Corporation Integrated interposer solutions for 2D and 3D IC packaging
US9412806B2 (en) 2014-06-13 2016-08-09 Invensas Corporation Making multilayer 3D capacitors using arrays of upstanding rods or ridges
US9252127B1 (en) 2014-07-10 2016-02-02 Invensas Corporation Microelectronic assemblies with integrated circuits and interposers with cavities, and methods of manufacture
US9478504B1 (en) 2015-06-19 2016-10-25 Invensas Corporation Microelectronic assemblies with cavities, and methods of fabrication
CN105174195A (zh) * 2015-10-12 2015-12-23 美新半导体(无锡)有限公司 一种腔体mems器件的晶圆级封装结构及封装方法
JP6981040B2 (ja) * 2017-05-17 2021-12-15 セイコーエプソン株式会社 封止構造、電子デバイス、電子機器、および移動体
US11174157B2 (en) * 2018-06-27 2021-11-16 Advanced Semiconductor Engineering Inc. Semiconductor device packages and methods of manufacturing the same
CN110642220A (zh) * 2018-06-27 2020-01-03 日月光半导体制造股份有限公司 半导体装置封装和其制造方法
CN111887695B (zh) * 2018-10-10 2021-10-15 章玉春 一种服装机械用的便于取衣服的衣架设备

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6228675B1 (en) * 1999-07-23 2001-05-08 Agilent Technologies, Inc. Microcap wafer-level package with vias
DE60025214T2 (de) * 2000-10-19 2006-08-24 Agilent Technologies, Inc. (n.d.Ges.d.Staates Delaware), Palo Alto Mikrodeckelgehäuse auf Scheibenebene
SG111972A1 (en) * 2002-10-17 2005-06-29 Agency Science Tech & Res Wafer-level package for micro-electro-mechanical systems
US20040259325A1 (en) * 2003-06-19 2004-12-23 Qing Gan Wafer level chip scale hermetic package
KR100541087B1 (ko) * 2003-10-01 2006-01-10 삼성전기주식회사 마이크로 디바이스를 위한 웨이퍼 레벨 패키지 및 제조방법
US20070004079A1 (en) * 2005-06-30 2007-01-04 Geefay Frank S Method for making contact through via contact to an offset contactor inside a cap for the wafer level packaging of FBAR chips

Also Published As

Publication number Publication date
US20060175707A1 (en) 2006-08-10
JP2006216963A (ja) 2006-08-17
EP1688994B1 (de) 2008-08-13
US7579685B2 (en) 2009-08-25
EP1688994A1 (de) 2006-08-09
KR100594952B1 (ko) 2006-06-30

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee