DE602005007300D1 - Nichtflüchtiger Speicher mit verbesserter Auslesegeschwindigkeit beim Initialisieren - Google Patents

Nichtflüchtiger Speicher mit verbesserter Auslesegeschwindigkeit beim Initialisieren

Info

Publication number
DE602005007300D1
DE602005007300D1 DE602005007300T DE602005007300T DE602005007300D1 DE 602005007300 D1 DE602005007300 D1 DE 602005007300D1 DE 602005007300 T DE602005007300 T DE 602005007300T DE 602005007300 T DE602005007300 T DE 602005007300T DE 602005007300 D1 DE602005007300 D1 DE 602005007300D1
Authority
DE
Germany
Prior art keywords
volatile memory
speed during
during initialization
out speed
improved read
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
DE602005007300T
Other languages
English (en)
Inventor
Masayuki Toyama
Tokuzo Kiyohara
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Publication of DE602005007300D1 publication Critical patent/DE602005007300D1/de
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G11C16/20—Initialising; Data preset; Chip identification
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1015—Read-write modes for single port memories, i.e. having either a random port or a serial port
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1015—Read-write modes for single port memories, i.e. having either a random port or a serial port
    • G11C7/1045—Read-write mode select circuits
DE602005007300T 2004-09-03 2005-08-18 Nichtflüchtiger Speicher mit verbesserter Auslesegeschwindigkeit beim Initialisieren Active DE602005007300D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2004257278 2004-09-03

Publications (1)

Publication Number Publication Date
DE602005007300D1 true DE602005007300D1 (de) 2008-07-17

Family

ID=35482138

Family Applications (1)

Application Number Title Priority Date Filing Date
DE602005007300T Active DE602005007300D1 (de) 2004-09-03 2005-08-18 Nichtflüchtiger Speicher mit verbesserter Auslesegeschwindigkeit beim Initialisieren

Country Status (4)

Country Link
US (1) US7259989B2 (de)
EP (1) EP1632950B1 (de)
CN (1) CN100545947C (de)
DE (1) DE602005007300D1 (de)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE112004002928T5 (de) * 2004-07-29 2007-08-09 Spansion LLC, Santa Clara Verfahren zum Steuern der Initialisierung eines nicht-flüchtigen Speicherbauelements und nicht-flüchtiges Speicherbauelement
KR100685638B1 (ko) * 2006-03-31 2007-02-22 주식회사 하이닉스반도체 랜덤 프로그램 기능을 가지는 듀얼 플레인 타입 플래시메모리 장치 및 그 프로그램 동작 방법
KR100802059B1 (ko) * 2006-09-06 2008-02-12 삼성전자주식회사 읽기 디스터브로 인한 배드 블록의 생성을 억제할 수 있는메모리 시스템 및 그것의 동작 방법
KR20120068192A (ko) * 2010-12-17 2012-06-27 에스케이하이닉스 주식회사 플래시 메모리 장치 및 그 동작 방법
US9396769B1 (en) * 2015-02-11 2016-07-19 Macronix International Co., Ltd. Memory device and operating method of same
ITUB20152310A1 (it) * 2015-07-20 2017-01-20 Sk Hynix Inc Regolatore per polarizzare un elemento interruttore di un buffer di pagina di una memoria non volatile
JP6779821B2 (ja) * 2017-03-24 2020-11-04 キオクシア株式会社 メモリシステム及びデータの読み出し方法

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61243545A (ja) 1985-04-22 1986-10-29 Nippon Telegr & Teleph Corp <Ntt> 多方向読み出し１方向書き込みメモリ装置
US5297029A (en) 1991-12-19 1994-03-22 Kabushiki Kaisha Toshiba Semiconductor memory device
JP3392839B2 (ja) 1991-12-19 2003-03-31 株式会社東芝 不揮発性半導体メモリ
JP3226426B2 (ja) 1994-09-27 2001-11-05 松下電器産業株式会社 半導体メモリ及びその使用方法並びに画像プロセッサ
US6134140A (en) * 1997-05-14 2000-10-17 Kabushiki Kaisha Toshiba Nonvolatile semiconductor memory device with soft-programming to adjust erased state of memory cells
JP3916862B2 (ja) 2000-10-03 2007-05-23 株式会社東芝 不揮発性半導体メモリ装置
JP2003067244A (ja) 2001-08-24 2003-03-07 Matsushita Electric Ind Co Ltd 不揮発性記憶装置及びその制御方法
JP3816788B2 (ja) 2001-11-22 2006-08-30 株式会社東芝 不揮発性半導体記憶装置
US6944063B2 (en) 2003-01-28 2005-09-13 Sandisk Corporation Non-volatile semiconductor memory with large erase blocks storing cycle counts
JP4256175B2 (ja) * 2003-02-04 2009-04-22 株式会社東芝 不揮発性半導体メモリ
US20050144363A1 (en) * 2003-12-30 2005-06-30 Sinclair Alan W. Data boundary management

Also Published As

Publication number Publication date
CN1767068A (zh) 2006-05-03
US20060050593A1 (en) 2006-03-09
US7259989B2 (en) 2007-08-21
CN100545947C (zh) 2009-09-30
EP1632950A1 (de) 2006-03-08
EP1632950B1 (de) 2008-06-04

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Legal Events

Date Code Title Description
8327 Change in the person/name/address of the patent owner

Owner name: PANASONIC CORP., KADOMA, OSAKA, JP

8364 No opposition during term of opposition