DE602005005823D1 - Schneller Analog-Digital-Wandler - Google Patents
Schneller Analog-Digital-WandlerInfo
- Publication number
- DE602005005823D1 DE602005005823D1 DE602005005823T DE602005005823T DE602005005823D1 DE 602005005823 D1 DE602005005823 D1 DE 602005005823D1 DE 602005005823 T DE602005005823 T DE 602005005823T DE 602005005823 T DE602005005823 T DE 602005005823T DE 602005005823 D1 DE602005005823 D1 DE 602005005823D1
- Authority
- DE
- Germany
- Prior art keywords
- digital converter
- fast analog
- analog
- fast
- converter
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/06—Continuously compensating for, or preventing, undesired influence of physical parameters
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Analogue/Digital Conversion (AREA)
- Amplifiers (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP05019801A EP1770866B1 (de) | 2005-09-12 | 2005-09-12 | Schneller Analog-Digital-Wandler |
Publications (2)
Publication Number | Publication Date |
---|---|
DE602005005823D1 true DE602005005823D1 (de) | 2008-05-15 |
DE602005005823T2 DE602005005823T2 (de) | 2009-05-07 |
Family
ID=35058860
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE602005005823T Active DE602005005823T2 (de) | 2005-09-12 | 2005-09-12 | Schneller Analog-Digital-Wandler |
Country Status (4)
Country | Link |
---|---|
US (1) | US7394420B2 (de) |
EP (1) | EP1770866B1 (de) |
JP (1) | JP4727511B2 (de) |
DE (1) | DE602005005823T2 (de) |
Families Citing this family (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
SI22397A (sl) * | 2006-10-11 | 2008-04-30 | Anton Pletersek | Interpolacijski postopek in vezje za izvajanje tega postopka, ki se uporabljata za kodirnik z visoko locljivostjo |
DE102009002062B4 (de) * | 2009-03-31 | 2013-08-22 | Ihp Gmbh - Innovations For High Performance Microelectronics / Leibniz-Institut Für Innovative Mikroelektronik | Analog-Digital-Umsetzer mit breitbandigem Eingangsnetzwerk |
US7936298B2 (en) * | 2009-09-18 | 2011-05-03 | Mediatek Singapore Pte. Ltd. | Integrated circuit and electronic device comprising threshold generation circuitry and method therefor |
RU2536377C1 (ru) * | 2013-04-26 | 2014-12-20 | Федеральное государственное бюджетное образовательное учреждение высшего профессионального образования "Южно-Российский государственный университет экономики и сервиса" (ФГБОУ ВПО "ЮРГУЭС") | Сверхбыстродействующий параллельный аналого-цифровой преобразователь с дифференциальным входом |
RU2523960C1 (ru) * | 2013-04-30 | 2014-07-27 | Федеральное государственное бюджетное образовательное учреждение высшего профессионального образования "Южно-Российский государственный университет экономики и сервиса" (ФГБОУ ВПО "ЮРГУЭС") | Сверхбыстродействующий параллельный аналого-цифровой преобразователь с дифференциальным входом |
RU2518997C1 (ru) * | 2013-04-30 | 2014-06-10 | Федеральное государственное бюджетное образовательное учреждение высшего профессионального образования "Южно-Российский государственный университет экономики и сервиса" (ФГБОУ ВПО "ЮРГУЭС") | Сверхбыстродействующий параллельный аналого-цифровой преобразователь с дифференциальным входом |
DE102015212842A1 (de) * | 2015-07-09 | 2017-01-12 | Forschungszentrum Jülich GmbH | Spannungsverstärker für einen programmierbaren Spannungsbereich |
Family Cites Families (21)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2268399B1 (de) * | 1974-04-22 | 1976-10-08 | Adersa | |
US3984832A (en) * | 1975-06-06 | 1976-10-05 | Motorola, Inc. | Series current analog to digital converter |
FR2427012A1 (fr) * | 1978-05-24 | 1979-12-21 | Labo Electronique Physique | Convertisseur analogique-numerique binaire |
EP0227165B1 (de) * | 1985-12-16 | 1992-09-09 | Koninklijke Philips Electronics N.V. | Schaltung zur Interpolation zwischen komplementären Spannungen |
DE4004546A1 (de) * | 1990-02-14 | 1991-08-22 | Siemens Ag | Differentieller analog-digitalumsetzer |
US5175550A (en) * | 1990-06-19 | 1992-12-29 | Analog Devices, Inc. | Repetitive cell matching technique for integrated circuits |
US5157397A (en) * | 1991-01-28 | 1992-10-20 | Trw Inc. | Quantizer and related method for improving linearity |
US5231399A (en) * | 1991-09-27 | 1993-07-27 | Trw Inc. | Differential quantizer reference resistor ladder for use with an analog-to-digital converter |
JP2875922B2 (ja) * | 1992-03-05 | 1999-03-31 | 三菱電機株式会社 | A/d変換器 |
US5598161A (en) * | 1992-12-18 | 1997-01-28 | Sony Corporation | Analog-to-digital converter having reduced circuit area |
US5376937A (en) * | 1993-02-22 | 1994-12-27 | The Regents Of The University Of California | Folding circuit |
US5600275A (en) * | 1994-04-29 | 1997-02-04 | Analog Devices, Inc. | Low-voltage CMOS comparator with offset cancellation |
US5589831A (en) * | 1995-01-30 | 1996-12-31 | Samsung Semiconductor, Inc. | Fully differential flash ADC based on the voltage follower amplifier structure |
US5736952A (en) * | 1996-10-09 | 1998-04-07 | International Business Machines Corporation | Current boost for differential flash analog to digital converter driver |
US6437724B1 (en) * | 1999-11-05 | 2002-08-20 | Texas Instruments Incorporated | Fully differential flash A/D converter |
US6445221B1 (en) * | 2000-03-10 | 2002-09-03 | International Business Machines Corporation | Input driver for a differential folder employing a static reference ladder |
WO2002078191A2 (en) * | 2001-03-23 | 2002-10-03 | Walter Snoeijs | Current folding cell and circuit comprising at least one folding cell |
US6646585B2 (en) * | 2002-04-05 | 2003-11-11 | Ess Technology, Inc. | Flash analog-to-digital converter |
US6882294B2 (en) * | 2003-08-06 | 2005-04-19 | Telasic Communications, Inc. | Resistive ladder, summing node circuit, and trimming method for a subranging analog to digital converter |
FR2863120B1 (fr) * | 2003-12-02 | 2006-02-17 | Atmel Grenoble Sa | Convertisseur analogique-numerique rapide |
US6847320B1 (en) * | 2004-02-13 | 2005-01-25 | National Semiconductor Corporation | ADC linearity improvement |
-
2005
- 2005-09-12 DE DE602005005823T patent/DE602005005823T2/de active Active
- 2005-09-12 EP EP05019801A patent/EP1770866B1/de active Active
-
2006
- 2006-06-20 JP JP2006170220A patent/JP4727511B2/ja active Active
- 2006-09-07 US US11/470,789 patent/US7394420B2/en active Active
Also Published As
Publication number | Publication date |
---|---|
US20070057832A1 (en) | 2007-03-15 |
DE602005005823T2 (de) | 2009-05-07 |
US7394420B2 (en) | 2008-07-01 |
EP1770866A1 (de) | 2007-04-04 |
EP1770866B1 (de) | 2008-04-02 |
JP2007082184A (ja) | 2007-03-29 |
JP4727511B2 (ja) | 2011-07-20 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition |