DE602004009100D1 - Verfahren und vorrichtung zur empfängerdetektion auf einem pci-expressbus - Google Patents

Verfahren und vorrichtung zur empfängerdetektion auf einem pci-expressbus

Info

Publication number
DE602004009100D1
DE602004009100D1 DE602004009100T DE602004009100T DE602004009100D1 DE 602004009100 D1 DE602004009100 D1 DE 602004009100D1 DE 602004009100 T DE602004009100 T DE 602004009100T DE 602004009100 T DE602004009100 T DE 602004009100T DE 602004009100 D1 DE602004009100 D1 DE 602004009100D1
Authority
DE
Germany
Prior art keywords
pci express
express bus
receiving detection
detection
receiving
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
DE602004009100T
Other languages
English (en)
Other versions
DE602004009100T2 (de
Inventor
Chunbing Guo
Fuji Yang
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Agere Systems LLC
Original Assignee
Agere Systems LLC
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Agere Systems LLC filed Critical Agere Systems LLC
Publication of DE602004009100D1 publication Critical patent/DE602004009100D1/de
Application granted granted Critical
Publication of DE602004009100T2 publication Critical patent/DE602004009100T2/de
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/0264—Arrangements for coupling to transmission lines
    • H04L25/0272—Arrangements for coupling to multiple lines, e.g. for differential transmission
    • H04L25/0274—Arrangements for ensuring balanced coupling
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/22—Arrangements for detecting or preventing errors in the information received using redundant apparatus to increase reliability
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/38—Synchronous or start-stop systems, e.g. for Baudot code
    • H04L25/40—Transmitting circuits; Receiving circuits
    • H04L25/45—Transmitting circuits; Receiving circuits using electronic distributors

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Power Engineering (AREA)
  • Logic Circuits (AREA)
  • Communication Control (AREA)
DE602004009100T 2003-11-18 2004-07-29 Verfahren und vorrichtung zur empfängerdetektion auf einem pci-express bus Active DE602004009100T2 (de)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US52091703P 2003-11-18 2003-11-18
US520917P 2003-11-18
US10/822,027 US7222290B2 (en) 2003-11-18 2004-04-09 Method and apparatus for receiver detection on a PCI-Express bus
US822027 2004-04-09
PCT/US2004/024544 WO2005057414A1 (en) 2003-11-18 2004-07-29 Method and apparatus for receiver detection on a pci-express bus

Publications (2)

Publication Number Publication Date
DE602004009100D1 true DE602004009100D1 (de) 2007-10-31
DE602004009100T2 DE602004009100T2 (de) 2008-06-19

Family

ID=34577040

Family Applications (1)

Application Number Title Priority Date Filing Date
DE602004009100T Active DE602004009100T2 (de) 2003-11-18 2004-07-29 Verfahren und vorrichtung zur empfängerdetektion auf einem pci-express bus

Country Status (5)

Country Link
US (1) US7222290B2 (de)
EP (1) EP1687726B1 (de)
JP (1) JP4818928B2 (de)
DE (1) DE602004009100T2 (de)
WO (1) WO2005057414A1 (de)

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US8989313B2 (en) 2013-03-11 2015-03-24 International Business Machines Corporation Adaptable receiver detection
US9906383B2 (en) 2015-02-02 2018-02-27 Samsung Electronics Co., Ltd. Semiconductor device, semiconductor system and method of operating semiconductor device
US10048731B2 (en) * 2015-06-26 2018-08-14 Intel Corporation Mitigation of charging induced voltage offset
JP6744605B2 (ja) * 2016-07-29 2020-08-19 ザインエレクトロニクス株式会社 送信装置および送受信システム
JP7059860B2 (ja) * 2018-08-06 2022-04-26 富士通株式会社 パラメータ設定送受信システムおよびパラメータ設定方法

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Also Published As

Publication number Publication date
EP1687726A1 (de) 2006-08-09
US20050104623A1 (en) 2005-05-19
WO2005057414A1 (en) 2005-06-23
JP4818928B2 (ja) 2011-11-16
US7222290B2 (en) 2007-05-22
DE602004009100T2 (de) 2008-06-19
JP2007511846A (ja) 2007-05-10
EP1687726B1 (de) 2007-09-19

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