DE602004004892D1 - Ein Reihendekodierer für NAND-Speicher - Google Patents
Ein Reihendekodierer für NAND-SpeicherInfo
- Publication number
- DE602004004892D1 DE602004004892D1 DE602004004892T DE602004004892T DE602004004892D1 DE 602004004892 D1 DE602004004892 D1 DE 602004004892D1 DE 602004004892 T DE602004004892 T DE 602004004892T DE 602004004892 T DE602004004892 T DE 602004004892T DE 602004004892 D1 DE602004004892 D1 DE 602004004892D1
- Authority
- DE
- Germany
- Prior art keywords
- row decoder
- nand memory
- nand
- memory
- decoder
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C8/00—Arrangements for selecting an address in a digital store
- G11C8/10—Decoders
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/08—Address circuits; Decoders; Word-line control circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
- G11C16/0483—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells having several storage transistors connected in series
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- For Increasing The Reliability Of Semiconductor Memories (AREA)
- Read Only Memory (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP04425626A EP1626413B1 (de) | 2004-08-11 | 2004-08-11 | Ein Reihendekodierer für NAND-Speicher |
Publications (1)
Publication Number | Publication Date |
---|---|
DE602004004892D1 true DE602004004892D1 (de) | 2007-04-05 |
Family
ID=34932717
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE602004004892T Active DE602004004892D1 (de) | 2004-08-11 | 2004-08-11 | Ein Reihendekodierer für NAND-Speicher |
Country Status (3)
Country | Link |
---|---|
US (1) | US7180786B2 (de) |
EP (1) | EP1626413B1 (de) |
DE (1) | DE602004004892D1 (de) |
Families Citing this family (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7212447B2 (en) * | 2005-08-04 | 2007-05-01 | Micron Technology, Inc. | NAND flash memory cell programming |
KR100769772B1 (ko) * | 2006-09-29 | 2007-10-23 | 주식회사 하이닉스반도체 | 플래시 메모리 장치 및 이를 이용한 소거 방법 |
KR100898667B1 (ko) * | 2007-08-06 | 2009-05-22 | 주식회사 하이닉스반도체 | 반도체 메모리 소자 |
JP2009141278A (ja) * | 2007-12-10 | 2009-06-25 | Toshiba Corp | 不揮発性半導体記憶装置 |
JP2009146495A (ja) * | 2007-12-13 | 2009-07-02 | Toshiba Corp | Nand型フラッシュメモリ |
KR100965066B1 (ko) * | 2008-03-28 | 2010-06-21 | 주식회사 하이닉스반도체 | 플래시 메모리 소자 및 그 블록 선택 회로 |
KR100960448B1 (ko) * | 2008-05-13 | 2010-05-28 | 주식회사 하이닉스반도체 | 불휘발성 메모리 장치의 프로그램 검증 방법 |
KR101024125B1 (ko) * | 2009-01-22 | 2011-03-22 | 주식회사 하이닉스반도체 | 플래시 메모리 소자의 블럭 디코더 |
KR101066696B1 (ko) * | 2009-06-29 | 2011-09-21 | 주식회사 하이닉스반도체 | 불휘발성 메모리 소자 |
JP2012119013A (ja) | 2010-11-29 | 2012-06-21 | Toshiba Corp | 不揮発性半導体記憶装置 |
US9460805B1 (en) * | 2015-10-19 | 2016-10-04 | Sandisk Technologies Llc | Word line dependent channel pre-charge for memory |
US10262743B2 (en) | 2016-10-25 | 2019-04-16 | Sandisk Technologies Llc | Command sequence for first read solution for memory |
US10347315B2 (en) | 2017-10-31 | 2019-07-09 | Sandisk Technologies Llc | Group read refresh |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH07235193A (ja) * | 1993-12-28 | 1995-09-05 | Toshiba Corp | 半導体記憶装置 |
US6072719A (en) * | 1996-04-19 | 2000-06-06 | Kabushiki Kaisha Toshiba | Semiconductor memory device |
JP3749789B2 (ja) * | 1998-06-08 | 2006-03-01 | 株式会社東芝 | 半導体記憶装置 |
TW430793B (en) * | 1999-05-20 | 2001-04-21 | Ind Tech Res Inst | Self-row identification hidden-type refresh-circuit and refresh method |
-
2004
- 2004-08-11 DE DE602004004892T patent/DE602004004892D1/de active Active
- 2004-08-11 EP EP04425626A patent/EP1626413B1/de not_active Expired - Fee Related
-
2005
- 2005-08-11 US US11/202,632 patent/US7180786B2/en active Active
Also Published As
Publication number | Publication date |
---|---|
US20060050575A1 (en) | 2006-03-09 |
US7180786B2 (en) | 2007-02-20 |
EP1626413B1 (de) | 2007-02-21 |
EP1626413A1 (de) | 2006-02-15 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8332 | No legal effect for de |