DE60139109D1 - Gemeinsamer Programmspeicher für Mehrkern-DSP-Bausteine - Google Patents

Gemeinsamer Programmspeicher für Mehrkern-DSP-Bausteine

Info

Publication number
DE60139109D1
DE60139109D1 DE60139109T DE60139109T DE60139109D1 DE 60139109 D1 DE60139109 D1 DE 60139109D1 DE 60139109 T DE60139109 T DE 60139109T DE 60139109 T DE60139109 T DE 60139109T DE 60139109 D1 DE60139109 D1 DE 60139109D1
Authority
DE
Germany
Prior art keywords
memory
program
program memory
access
clock cycle
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60139109T
Other languages
English (en)
Inventor
Kenneth C Kelly
Irvinderpal S Ghai
Jay B Reimer
Tai Huu Nguyen
Harland Glenn Hopkin
Yi Lou
Jason A T Jones
Dan K Bui
Patrick J Smith
Kevin A Mcgonagle
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Texas Instruments Inc
Original Assignee
Texas Instruments Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Texas Instruments Inc filed Critical Texas Instruments Inc
Application granted granted Critical
Publication of DE60139109D1 publication Critical patent/DE60139109D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3802—Instruction prefetching
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • G06F15/78—Architectures of general purpose stored program computers comprising a single central processing unit
    • G06F15/7839—Architectures of general purpose stored program computers comprising a single central processing unit with memory
    • G06F15/7842—Architectures of general purpose stored program computers comprising a single central processing unit with memory on one IC chip (single chip microcontrollers)
    • G06F15/786—Architectures of general purpose stored program computers comprising a single central processing unit with memory on one IC chip (single chip microcontrollers) using a single memory module
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3877—Concurrent instruction execution, e.g. pipeline or look ahead using a slave processor, e.g. coprocessor
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3877—Concurrent instruction execution, e.g. pipeline or look ahead using a slave processor, e.g. coprocessor
    • G06F9/3879—Concurrent instruction execution, e.g. pipeline or look ahead using a slave processor, e.g. coprocessor for non-native instruction execution, e.g. executing a command; for Java instruction set
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3885—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units
    • G06F9/3889—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units controlled by multiple instructions, e.g. MIMD, decoupled access or execute
    • G06F9/3891—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units controlled by multiple instructions, e.g. MIMD, decoupled access or execute organised in groups of units sharing resources, e.g. clusters
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microcomputers (AREA)
  • Complex Calculations (AREA)
  • Dram (AREA)
  • Memory System (AREA)
  • Multi Processors (AREA)
  • Bus Control (AREA)
DE60139109T 2000-11-08 2001-11-07 Gemeinsamer Programmspeicher für Mehrkern-DSP-Bausteine Expired - Lifetime DE60139109D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US24664800P 2000-11-08 2000-11-08

Publications (1)

Publication Number Publication Date
DE60139109D1 true DE60139109D1 (de) 2009-08-13

Family

ID=22931584

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60139109T Expired - Lifetime DE60139109D1 (de) 2000-11-08 2001-11-07 Gemeinsamer Programmspeicher für Mehrkern-DSP-Bausteine

Country Status (5)

Country Link
US (1) US6691216B2 (de)
EP (1) EP1239374B1 (de)
JP (1) JP2002196974A (de)
AT (1) ATE435461T1 (de)
DE (1) DE60139109D1 (de)

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US6691216B2 (en) * 2000-11-08 2004-02-10 Texas Instruments Incorporated Shared program memory for use in multicore DSP devices
US6862640B2 (en) * 2001-04-10 2005-03-01 Texas Instruments Incorporated Arbitration in local system for access to memory in a distant subsystem
US7131114B2 (en) * 2001-07-16 2006-10-31 Texas Instruments Incorporated Debugger breakpoint management in a multicore DSP device having shared program memory
US6871247B1 (en) * 2001-11-08 2005-03-22 Lsi Logic Corporation Mechanism for supporting self-modifying code in a harvard architecture digital signal processor and method of operation thereof
US7237071B2 (en) * 2001-12-20 2007-06-26 Texas Instruments Incorporated Embedded symmetric multiprocessor system with arbitration control of access to shared resources
US7117389B2 (en) * 2003-09-18 2006-10-03 International Business Machines Corporation Multiple processor core device having shareable functional units for self-repairing capability
US7389405B2 (en) * 2003-11-17 2008-06-17 Mediatek, Inc. Digital signal processor architecture with optimized memory access for code discontinuity
DE102004036233B3 (de) * 2004-07-26 2005-11-17 Infineon Technologies Ag Mikrocontroller- bzw. Mikroprozessor-System
US7664970B2 (en) * 2005-12-30 2010-02-16 Intel Corporation Method and apparatus for a zero voltage processor sleep state
US7966511B2 (en) 2004-07-27 2011-06-21 Intel Corporation Power management coordination in multi-core processors
US7699021B2 (en) 2004-12-22 2010-04-20 Sokudo Co., Ltd. Cluster tool substrate throughput optimization
US7798764B2 (en) 2005-12-22 2010-09-21 Applied Materials, Inc. Substrate processing sequence in a cartesian robot cluster tool
US7255747B2 (en) 2004-12-22 2007-08-14 Sokudo Co., Ltd. Coat/develop module with independent stations
US7356680B2 (en) * 2005-01-22 2008-04-08 Telefonaktiebolaget L M Ericsson (Publ) Method of loading information into a slave processor in a multi-processor system using an operating-system-friendly boot loader
US9183087B2 (en) * 2005-06-07 2015-11-10 Seagate Technology Llc Data storage subgroup with local and shared resources
EP1963963A2 (de) * 2005-12-06 2008-09-03 Boston Circuits, Inc. Verfahren und vorrichtung zur mehrkernverarbeitung mit eigenem thread-management
US8082289B2 (en) 2006-06-13 2011-12-20 Advanced Cluster Systems, Inc. Cluster computing support for application programs
US7533222B2 (en) * 2006-06-29 2009-05-12 Mosys, Inc. Dual-port SRAM memory using single-port memory cell
DE102007004280A1 (de) * 2007-01-23 2008-07-24 Siemens Ag Ein-Chip-Computer und Tachograph
CN101415068A (zh) * 2007-10-18 2009-04-22 鸿富锦精密工业（深圳）有限公司 信息处理系统及方法
US7958341B1 (en) 2008-07-07 2011-06-07 Ovics Processing stream instruction in IC of mesh connected matrix of processors containing pipeline coupled switch transferring messages over consecutive cycles from one link to another link or memory
US7870365B1 (en) 2008-07-07 2011-01-11 Ovics Matrix of processors with data stream instruction execution pipeline coupled to data switch linking to neighbor units by non-contentious command channel / data channel
US8145880B1 (en) 2008-07-07 2012-03-27 Ovics Matrix processor data switch routing systems and methods
US8131975B1 (en) 2008-07-07 2012-03-06 Ovics Matrix processor initialization systems and methods
US8327114B1 (en) 2008-07-07 2012-12-04 Ovics Matrix processor proxy systems and methods
JP5578811B2 (ja) * 2009-06-30 2014-08-27 キヤノン株式会社 情報処理装置、情報処理装置の制御方法及びプログラム
US8381006B2 (en) 2010-04-08 2013-02-19 International Business Machines Corporation Reducing power requirements of a multiple core processor
WO2012123061A1 (en) * 2011-02-17 2012-09-20 Hyperion Core Inc. Parallel memory systems
US9514069B1 (en) 2012-05-24 2016-12-06 Schwegman, Lundberg & Woessner, P.A. Enhanced computer processor and memory management architecture
US9442559B2 (en) 2013-03-14 2016-09-13 Intel Corporation Exploiting process variation in a multicore processor
CN104301016B (zh) * 2014-09-28 2018-08-28 北京邮电大学 一种基于多核dsp的mimo并行检测方法及系统
US10983931B2 (en) 2015-04-30 2021-04-20 Microchip Technology Incorporated Central processing unit with enhanced instruction set
GB2542853B (en) * 2015-10-02 2021-12-15 Cambridge Consultants Processing apparatus and methods
US10073718B2 (en) 2016-01-15 2018-09-11 Intel Corporation Systems, methods and devices for determining work placement on processor cores
US10565109B2 (en) * 2017-09-05 2020-02-18 International Business Machines Corporation Asynchronous update of metadata tracks in response to a cache hit generated via an I/O operation over a bus interface
US10635494B2 (en) * 2018-05-08 2020-04-28 Microchip Technology Incorporated Memory pool allocation for a multi-core system
CN111258769B (zh) * 2018-11-30 2022-12-09 上海寒武纪信息科技有限公司 数据传输装置和方法
US11157206B2 (en) * 2019-07-01 2021-10-26 Realtek Singapore Private Limited Multi-die system capable of sharing non-volatile memory
CN112243266B (zh) * 2019-07-18 2024-04-19 大唐联仪科技有限公司 一种数据组包方法及装置
CN112559434B (zh) * 2019-09-25 2023-12-08 阿里巴巴集团控股有限公司 一种多核处理器及核间数据转发方法
WO2021174446A1 (zh) * 2020-03-04 2021-09-10 北京希姆计算科技有限公司 一种数据处理装置及数据处理方法
TWI816032B (zh) * 2020-04-10 2023-09-21 新唐科技股份有限公司 多核心處理器電路

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JP2000067020A (ja) 1998-08-20 2000-03-03 Nec Corp マルチプロセッサシステム
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US6691216B2 (en) * 2000-11-08 2004-02-10 Texas Instruments Incorporated Shared program memory for use in multicore DSP devices
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US6862640B2 (en) * 2001-04-10 2005-03-01 Texas Instruments Incorporated Arbitration in local system for access to memory in a distant subsystem

Also Published As

Publication number Publication date
EP1239374B1 (de) 2009-07-01
EP1239374A1 (de) 2002-09-11
ATE435461T1 (de) 2009-07-15
US20020056030A1 (en) 2002-05-09
JP2002196974A (ja) 2002-07-12
US6691216B2 (en) 2004-02-10

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Legal Events

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