DE60124252D1 - Zweistufiges chemisch-mechanisches polierverfahren - Google Patents

Zweistufiges chemisch-mechanisches polierverfahren

Info

Publication number
DE60124252D1
DE60124252D1 DE60124252T DE60124252T DE60124252D1 DE 60124252 D1 DE60124252 D1 DE 60124252D1 DE 60124252 T DE60124252 T DE 60124252T DE 60124252 T DE60124252 T DE 60124252T DE 60124252 D1 DE60124252 D1 DE 60124252D1
Authority
DE
Germany
Prior art keywords
mechanical polishing
chemical mechanical
polishing method
stage chemical
stage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60124252T
Other languages
English (en)
Other versions
DE60124252T2 (de
Inventor
Joseph Page
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Qimonda AG
Original Assignee
Infineon Technologies North America Corp
Infineon Technologies Richmond LP
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Family has litigation
First worldwide family litigation filed litigation Critical https://patents.darts-ip.com/?family=26908978&utm_source=google_patent&utm_medium=platform_link&utm_campaign=public_patent_search&patent=DE60124252(D1) "Global patent litigation dataset” by Darts-ip is licensed under a Creative Commons Attribution 4.0 International License.
Application filed by Infineon Technologies North America Corp, Infineon Technologies Richmond LP filed Critical Infineon Technologies North America Corp
Publication of DE60124252D1 publication Critical patent/DE60124252D1/de
Application granted granted Critical
Publication of DE60124252T2 publication Critical patent/DE60124252T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B24—GRINDING; POLISHING
    • B24B—MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
    • B24B37/00—Lapping machines or devices; Accessories
    • B24B37/11—Lapping tools
    • B24B37/20—Lapping pads for working plane surfaces
    • B24B37/24—Lapping pads for working plane surfaces characterised by the composition or properties of the pad materials
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B24—GRINDING; POLISHING
    • B24B—MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
    • B24B37/00—Lapping machines or devices; Accessories
    • B24B37/04—Lapping machines or devices; Accessories designed for working plane surfaces
    • B24B37/042—Lapping machines or devices; Accessories designed for working plane surfaces operating processes therefor
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B24—GRINDING; POLISHING
    • B24B—MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
    • B24B37/00—Lapping machines or devices; Accessories
    • B24B37/11—Lapping tools
    • B24B37/20—Lapping pads for working plane surfaces
    • B24B37/24—Lapping pads for working plane surfaces characterised by the composition or properties of the pad materials
    • B24B37/245—Pads with fixed abrasives
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/31051—Planarisation of the insulating layers
    • H01L21/31053—Planarisation of the insulating layers involving a dielectric removal step

Landscapes

  • Engineering & Computer Science (AREA)
  • Mechanical Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)
  • Finish Polishing, Edge Sharpening, And Grinding By Specific Grinding Devices (AREA)
DE60124252T 2000-06-28 2001-06-28 Zweistufiges chemisch-mechanisches polierverfahren Expired - Lifetime DE60124252T2 (de)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US21440900P 2000-06-28 2000-06-28
US214409P 2000-06-28
US723802 2000-06-28
US09/723,802 US6593240B1 (en) 2000-06-28 2000-11-28 Two step chemical mechanical polishing process
PCT/US2001/020623 WO2002001620A2 (en) 2000-06-28 2001-06-28 Two step chemical mechanical polishing process

Publications (2)

Publication Number Publication Date
DE60124252D1 true DE60124252D1 (de) 2006-12-14
DE60124252T2 DE60124252T2 (de) 2007-09-20

Family

ID=26908978

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60124252T Expired - Lifetime DE60124252T2 (de) 2000-06-28 2001-06-28 Zweistufiges chemisch-mechanisches polierverfahren

Country Status (5)

Country Link
US (1) US6593240B1 (de)
EP (1) EP1295322B1 (de)
DE (1) DE60124252T2 (de)
TW (1) TW576772B (de)
WO (1) WO2002001620A2 (de)

Families Citing this family (36)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20020183053A1 (en) * 2001-05-29 2002-12-05 Muralimohan Gopalakrishna Methods and systems for testing macrodiversity and handover functionality of a radio network controller
US7677956B2 (en) 2002-05-10 2010-03-16 Cabot Microelectronics Corporation Compositions and methods for dielectric CMP
US7077992B2 (en) 2002-07-11 2006-07-18 Molecular Imprints, Inc. Step and repeat imprint lithography processes
US8349241B2 (en) 2002-10-04 2013-01-08 Molecular Imprints, Inc. Method to arrange features on a substrate to replicate features having minimal dimensional variability
US7071105B2 (en) 2003-02-03 2006-07-04 Cabot Microelectronics Corporation Method of polishing a silicon-containing dielectric
US7172970B2 (en) * 2003-03-11 2007-02-06 United Microelectronics Corp. Polish method for semiconductor device planarization
US7294575B2 (en) * 2004-01-05 2007-11-13 United Microelectronics Corp. Chemical mechanical polishing process for forming shallow trench isolation structure
US7109117B2 (en) * 2004-01-14 2006-09-19 Taiwan Semiconductor Manufacturing Company, Ltd. Method for chemical mechanical polishing of a shallow trench isolation structure
US7125321B2 (en) * 2004-12-17 2006-10-24 Intel Corporation Multi-platen multi-slurry chemical mechanical polishing process
US7291280B2 (en) * 2004-12-28 2007-11-06 Rohm And Haas Electronic Materials Cmp Holdings, Inc. Multi-step methods for chemical mechanical polishing silicon dioxide and silicon nitride
KR100614773B1 (ko) * 2004-12-28 2006-08-22 삼성전자주식회사 화학 기계적 연마 방법
US7803308B2 (en) 2005-12-01 2010-09-28 Molecular Imprints, Inc. Technique for separating a mold from solidified imprinting material
US7906058B2 (en) 2005-12-01 2011-03-15 Molecular Imprints, Inc. Bifurcated contact printing technique
US7670530B2 (en) 2006-01-20 2010-03-02 Molecular Imprints, Inc. Patterning substrates employing multiple chucks
US7670529B2 (en) 2005-12-08 2010-03-02 Molecular Imprints, Inc. Method and system for double-sided patterning of substrates
JP5306989B2 (ja) * 2006-04-03 2013-10-02 モレキュラー・インプリンツ・インコーポレーテッド 複数のフィールド及びアライメント・マークを有する基板を同時にパターニングする方法
US8850980B2 (en) 2006-04-03 2014-10-07 Canon Nanotechnologies, Inc. Tessellated patterns in imprint lithography
US7802978B2 (en) 2006-04-03 2010-09-28 Molecular Imprints, Inc. Imprinting of partial fields at the edge of the wafer
US8142850B2 (en) 2006-04-03 2012-03-27 Molecular Imprints, Inc. Patterning a plurality of fields on a substrate to compensate for differing evaporation times
US8012395B2 (en) 2006-04-18 2011-09-06 Molecular Imprints, Inc. Template having alignment marks formed of contrast material
US7510974B2 (en) * 2006-05-05 2009-03-31 United Microelectronics Corp. CMP process
WO2016051796A1 (ja) * 2014-10-01 2016-04-07 日東電工株式会社 研磨パッド
US9969049B2 (en) * 2015-06-29 2018-05-15 Iv Technologies Co., Ltd. Polishing layer of polishing pad and method of forming the same and polishing method
US11342256B2 (en) 2019-01-24 2022-05-24 Applied Materials, Inc. Method of fine redistribution interconnect formation for advanced packaging applications
IT201900006740A1 (it) * 2019-05-10 2020-11-10 Applied Materials Inc Procedimenti di strutturazione di substrati
IT201900006736A1 (it) 2019-05-10 2020-11-10 Applied Materials Inc Procedimenti di fabbricazione di package
US11931855B2 (en) 2019-06-17 2024-03-19 Applied Materials, Inc. Planarization methods for packaging substrates
US11862546B2 (en) 2019-11-27 2024-01-02 Applied Materials, Inc. Package core assembly and fabrication methods
US11257790B2 (en) 2020-03-10 2022-02-22 Applied Materials, Inc. High connectivity device stacking
US11454884B2 (en) 2020-04-15 2022-09-27 Applied Materials, Inc. Fluoropolymer stamp fabrication method
US11400545B2 (en) 2020-05-11 2022-08-02 Applied Materials, Inc. Laser ablation for package fabrication
US11232951B1 (en) 2020-07-14 2022-01-25 Applied Materials, Inc. Method and apparatus for laser drilling blind vias
US11676832B2 (en) 2020-07-24 2023-06-13 Applied Materials, Inc. Laser ablation system for package fabrication
US11521937B2 (en) 2020-11-16 2022-12-06 Applied Materials, Inc. Package structures with built-in EMI shielding
US11404318B2 (en) 2020-11-20 2022-08-02 Applied Materials, Inc. Methods of forming through-silicon vias in substrates for advanced packaging
US11705365B2 (en) 2021-05-18 2023-07-18 Applied Materials, Inc. Methods of micro-via formation for advanced packaging

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5290396A (en) * 1991-06-06 1994-03-01 Lsi Logic Corporation Trench planarization techniques
US6069081A (en) 1995-04-28 2000-05-30 International Buiness Machines Corporation Two-step chemical mechanical polish surface planarization technique
US5951373A (en) * 1995-10-27 1999-09-14 Applied Materials, Inc. Circumferentially oscillating carousel apparatus for sequentially processing substrates for polishing and cleaning
US5872043A (en) * 1996-07-25 1999-02-16 Industrial Technology Research Institute Method of planarizing wafers with shallow trench isolation
US5965459A (en) * 1996-10-11 1999-10-12 International Business Machines Corporation Method for removing crevices induced by chemical-mechanical polishing
US5876490A (en) * 1996-12-09 1999-03-02 International Business Machines Corporatin Polish process and slurry for planarization
US5817567A (en) * 1997-04-07 1998-10-06 Taiwan Semiconductor Manufacturing Company Ltd. Shallow trench isolation method
US5934980A (en) * 1997-06-09 1999-08-10 Micron Technology, Inc. Method of chemical mechanical polishing
US5899745A (en) * 1997-07-03 1999-05-04 Motorola, Inc. Method of chemical mechanical polishing (CMP) using an underpad with different compression regions and polishing pad therefor
US5880007A (en) 1997-09-30 1999-03-09 Siemens Aktiengesellschaft Planarization of a non-conformal device layer in semiconductor fabrication
US5975991A (en) * 1997-11-26 1999-11-02 Speedfam-Ipec Corporation Method and apparatus for processing workpieces with multiple polishing elements
WO2000002235A1 (en) * 1998-07-06 2000-01-13 Strasbaugh Method of planarizing integrated circuits
US6435942B1 (en) * 1999-02-11 2002-08-20 Applied Materials, Inc. Chemical mechanical polishing processes and components
US6315645B1 (en) * 1999-04-14 2001-11-13 Vlsi Technology, Inc. Patterned polishing pad for use in chemical mechanical polishing of semiconductor wafers
US6227949B1 (en) * 1999-06-03 2001-05-08 Promos Technologies, Inc. Two-slurry CMP polishing with different particle size abrasives

Also Published As

Publication number Publication date
WO2002001620A2 (en) 2002-01-03
EP1295322A2 (de) 2003-03-26
EP1295322B1 (de) 2006-11-02
US6593240B1 (en) 2003-07-15
TW576772B (en) 2004-02-21
WO2002001620A3 (en) 2002-05-23
DE60124252T2 (de) 2007-09-20

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Legal Events

Date Code Title Description
8327 Change in the person/name/address of the patent owner

Owner name: INFINEON TECHNOLOGIES NORTH AMERICA CORP., SAN, US

Owner name: QIMONDA RICHMOND,LLC (N.D.GES.D.STAATES DELAWA, US

8328 Change in the person/name/address of the agent

Representative=s name: EPPING HERMANN FISCHER, PATENTANWALTSGESELLSCHAFT

8364 No opposition during term of opposition
R082 Change of representative

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R081 Change of applicant/patentee

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Owner name: QIMONDA AG, DE

Free format text: FORMER OWNER: INFINEON TECHNOLOGIES NORTH AME, QIMONDA RICHMOND,LLC (N.D.GES.D, , US

Effective date: 20111208