DE60026836T2 - Anordnungen und verfahren für eine plattensteuerungspeicher architektur - Google Patents

Anordnungen und verfahren für eine plattensteuerungspeicher architektur Download PDF

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Publication number
DE60026836T2
DE60026836T2 DE60026836T DE60026836T DE60026836T2 DE 60026836 T2 DE60026836 T2 DE 60026836T2 DE 60026836 T DE60026836 T DE 60026836T DE 60026836 T DE60026836 T DE 60026836T DE 60026836 T2 DE60026836 T2 DE 60026836T2
Authority
DE
Germany
Prior art keywords
memory
data
storage device
fifo
buffer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60026836T
Other languages
German (de)
English (en)
Other versions
DE60026836D1 (de
Inventor
W. William Lake Forest DENNIN
C. Theodore Rancho Santa Magarita WHITE
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Marvell World Trade Ltd
Original Assignee
QLogic LLC
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US09/548,330 external-priority patent/US6401149B1/en
Priority claimed from US09/547,567 external-priority patent/US6330626B1/en
Application filed by QLogic LLC filed Critical QLogic LLC
Application granted granted Critical
Publication of DE60026836D1 publication Critical patent/DE60026836D1/de
Publication of DE60026836T2 publication Critical patent/DE60026836T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
    • G06F3/061—Improving I/O performance
    • G06F3/0613—Improving I/O performance in relation to throughput
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0655—Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices
    • G06F3/0656—Data buffering arrangements
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
    • G06F3/0671—In-line storage system
    • G06F3/0673—Single storage device
    • G06F3/0674—Disk device
    • G06F3/0676—Magnetic disk device

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Human Computer Interaction (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Bus Control (AREA)
  • Information Transfer Systems (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Communication Control (AREA)
  • Signal Processing For Digital Recording And Reproducing (AREA)
DE60026836T 1999-05-05 2000-05-05 Anordnungen und verfahren für eine plattensteuerungspeicher architektur Expired - Lifetime DE60026836T2 (de)

Applications Claiming Priority (7)

Application Number Priority Date Filing Date Title
US548330 1990-07-02
US547567 1990-07-02
US13271299P 1999-05-05 1999-05-05
US132712P 1999-05-05
US09/548,330 US6401149B1 (en) 1999-05-05 2000-04-12 Methods for context switching within a disk controller
US09/547,567 US6330626B1 (en) 1999-05-05 2000-04-12 Systems and methods for a disk controller memory architecture
PCT/US2000/012433 WO2000067107A1 (en) 1999-05-05 2000-05-05 Systems and methods for a disk controller memory architecture

Publications (2)

Publication Number Publication Date
DE60026836D1 DE60026836D1 (de) 2006-05-11
DE60026836T2 true DE60026836T2 (de) 2006-09-21

Family

ID=27384336

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60026836T Expired - Lifetime DE60026836T2 (de) 1999-05-05 2000-05-05 Anordnungen und verfahren für eine plattensteuerungspeicher architektur

Country Status (8)

Country Link
EP (1) EP1188106B1 (enExample)
JP (1) JP4741735B2 (enExample)
KR (1) KR100638378B1 (enExample)
AT (1) ATE321298T1 (enExample)
AU (1) AU4825600A (enExample)
CA (1) CA2370596C (enExample)
DE (1) DE60026836T2 (enExample)
WO (1) WO2000067107A1 (enExample)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20030093751A1 (en) * 2001-11-09 2003-05-15 David Hohl System and method for fast cyclic redundancy calculation
CN100403727C (zh) * 2004-04-21 2008-07-16 华为技术有限公司 一种传递数据包编辑命令的装置及方法
US9201599B2 (en) * 2004-07-19 2015-12-01 Marvell International Ltd. System and method for transmitting data in storage controllers
US20060015659A1 (en) * 2004-07-19 2006-01-19 Krantz Leon A System and method for transferring data using storage controllers
KR100621631B1 (ko) * 2005-01-11 2006-09-13 삼성전자주식회사 반도체 디스크 제어 장치
US8127089B1 (en) 2007-02-14 2012-02-28 Marvell International Ltd. Hard disk controller which coordinates transmission of buffered data with a host
JP4922442B2 (ja) * 2010-07-29 2012-04-25 株式会社東芝 バッファ管理装置、同装置を備えた記憶装置、及びバッファ管理方法
WO2016109570A1 (en) * 2014-12-30 2016-07-07 Micron Technology, Inc Systems and devices for accessing a state machine

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5315708A (en) * 1990-02-28 1994-05-24 Micro Technology, Inc. Method and apparatus for transferring data through a staging memory
US6081849A (en) * 1996-10-01 2000-06-27 Lsi Logic Corporation Method and structure for switching multiple contexts in storage subsystem target device
US5890207A (en) * 1996-11-27 1999-03-30 Emc Corporation High performance integrated cached storage device

Also Published As

Publication number Publication date
ATE321298T1 (de) 2006-04-15
KR100638378B1 (ko) 2006-10-25
EP1188106A1 (en) 2002-03-20
CA2370596C (en) 2010-01-12
EP1188106B1 (en) 2006-03-22
DE60026836D1 (de) 2006-05-11
JP2002543514A (ja) 2002-12-17
CA2370596A1 (en) 2000-11-09
WO2000067107A1 (en) 2000-11-09
KR20020019437A (ko) 2002-03-12
JP4741735B2 (ja) 2011-08-10
AU4825600A (en) 2000-11-17

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: MARVELL WORLD TRADE LTD., ST. MICHAEL, BB