JP4741735B2 - ディスク・コントローラ・メモリ・アーキテクチャ用システムおよび方法 - Google Patents

ディスク・コントローラ・メモリ・アーキテクチャ用システムおよび方法 Download PDF

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JP4741735B2
JP4741735B2 JP2000615882A JP2000615882A JP4741735B2 JP 4741735 B2 JP4741735 B2 JP 4741735B2 JP 2000615882 A JP2000615882 A JP 2000615882A JP 2000615882 A JP2000615882 A JP 2000615882A JP 4741735 B2 JP4741735 B2 JP 4741735B2
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fifo
data
memory
transfer
memory circuit
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Expired - Lifetime
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JP2000615882A
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Japanese (ja)
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JP2002543514A5 (enExample
JP2002543514A (ja
Inventor
デニイン、ウイリアム、ダブリュー.
ホワイト、セオドア、シー.
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マーベル ワールド トレード リミテッド
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Priority claimed from US09/547,567 external-priority patent/US6330626B1/en
Priority claimed from US09/548,330 external-priority patent/US6401149B1/en
Application filed by マーベル ワールド トレード リミテッド filed Critical マーベル ワールド トレード リミテッド
Publication of JP2002543514A publication Critical patent/JP2002543514A/ja
Publication of JP2002543514A5 publication Critical patent/JP2002543514A5/ja
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    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0602Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
    • G06F3/061Improving I/O performance
    • G06F3/0613Improving I/O performance in relation to throughput
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0628Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0655Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices
    • G06F3/0656Data buffering arrangements
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0668Interfaces specially adapted for storage systems adopting a particular infrastructure
    • G06F3/0671In-line storage system
    • G06F3/0673Single storage device
    • G06F3/0674Disk device
    • G06F3/0676Magnetic disk device

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Human Computer Interaction (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Bus Control (AREA)
  • Information Transfer Systems (AREA)
  • Communication Control (AREA)
  • Signal Processing For Digital Recording And Reproducing (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
JP2000615882A 1999-05-05 2000-05-05 ディスク・コントローラ・メモリ・アーキテクチャ用システムおよび方法 Expired - Lifetime JP4741735B2 (ja)

Applications Claiming Priority (7)

Application Number Priority Date Filing Date Title
US13271299P 1999-05-05 1999-05-05
US09/547,567 US6330626B1 (en) 1999-05-05 2000-04-12 Systems and methods for a disk controller memory architecture
US09/548,330 US6401149B1 (en) 1999-05-05 2000-04-12 Methods for context switching within a disk controller
US60/132,712 2000-04-12
US09/547,567 2000-04-12
US09/548,330 2000-04-12
PCT/US2000/012433 WO2000067107A1 (en) 1999-05-05 2000-05-05 Systems and methods for a disk controller memory architecture

Publications (3)

Publication Number Publication Date
JP2002543514A JP2002543514A (ja) 2002-12-17
JP2002543514A5 JP2002543514A5 (enExample) 2008-12-04
JP4741735B2 true JP4741735B2 (ja) 2011-08-10

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JP2000615882A Expired - Lifetime JP4741735B2 (ja) 1999-05-05 2000-05-05 ディスク・コントローラ・メモリ・アーキテクチャ用システムおよび方法

Country Status (8)

Country Link
EP (1) EP1188106B1 (enExample)
JP (1) JP4741735B2 (enExample)
KR (1) KR100638378B1 (enExample)
AT (1) ATE321298T1 (enExample)
AU (1) AU4825600A (enExample)
CA (1) CA2370596C (enExample)
DE (1) DE60026836T2 (enExample)
WO (1) WO2000067107A1 (enExample)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20030093751A1 (en) * 2001-11-09 2003-05-15 David Hohl System and method for fast cyclic redundancy calculation
CN100403727C (zh) * 2004-04-21 2008-07-16 华为技术有限公司 一种传递数据包编辑命令的装置及方法
US20060015659A1 (en) * 2004-07-19 2006-01-19 Krantz Leon A System and method for transferring data using storage controllers
US9201599B2 (en) * 2004-07-19 2015-12-01 Marvell International Ltd. System and method for transmitting data in storage controllers
KR100621631B1 (ko) * 2005-01-11 2006-09-13 삼성전자주식회사 반도체 디스크 제어 장치
US8127089B1 (en) 2007-02-14 2012-02-28 Marvell International Ltd. Hard disk controller which coordinates transmission of buffered data with a host
JP4922442B2 (ja) * 2010-07-29 2012-04-25 株式会社東芝 バッファ管理装置、同装置を備えた記憶装置、及びバッファ管理方法
US10430210B2 (en) * 2014-12-30 2019-10-01 Micron Technology, Inc. Systems and devices for accessing a state machine

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5315708A (en) * 1990-02-28 1994-05-24 Micro Technology, Inc. Method and apparatus for transferring data through a staging memory
US6081849A (en) * 1996-10-01 2000-06-27 Lsi Logic Corporation Method and structure for switching multiple contexts in storage subsystem target device
US5890207A (en) * 1996-11-27 1999-03-30 Emc Corporation High performance integrated cached storage device

Also Published As

Publication number Publication date
KR20020019437A (ko) 2002-03-12
DE60026836T2 (de) 2006-09-21
EP1188106B1 (en) 2006-03-22
CA2370596C (en) 2010-01-12
KR100638378B1 (ko) 2006-10-25
EP1188106A1 (en) 2002-03-20
DE60026836D1 (de) 2006-05-11
CA2370596A1 (en) 2000-11-09
WO2000067107A1 (en) 2000-11-09
ATE321298T1 (de) 2006-04-15
JP2002543514A (ja) 2002-12-17
AU4825600A (en) 2000-11-17

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