DE60005002D1 - Vertikal-threaded prozessor mit multidimensionalem speicher - Google Patents

Vertikal-threaded prozessor mit multidimensionalem speicher

Info

Publication number
DE60005002D1
DE60005002D1 DE60005002T DE60005002T DE60005002D1 DE 60005002 D1 DE60005002 D1 DE 60005002D1 DE 60005002 T DE60005002 T DE 60005002T DE 60005002 T DE60005002 T DE 60005002T DE 60005002 D1 DE60005002 D1 DE 60005002D1
Authority
DE
Germany
Prior art keywords
vertical
threaded processor
multidimensional memory
multidimensional
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60005002T
Other languages
English (en)
Other versions
DE60005002T2 (de
Inventor
N Joy
Marc Tremblay
Gary Lauterbach
I Chamdani
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sun Microsystems Inc
Original Assignee
Sun Microsystems Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sun Microsystems Inc filed Critical Sun Microsystems Inc
Application granted granted Critical
Publication of DE60005002D1 publication Critical patent/DE60005002D1/de
Publication of DE60005002T2 publication Critical patent/DE60005002T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30098—Register arrangements
    • G06F9/30141—Implementation provisions of register files, e.g. ports
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30098—Register arrangements
    • G06F9/3012—Organisation of register space, e.g. banked or distributed register file
    • G06F9/30123—Organisation of register space, e.g. banked or distributed register file according to context, e.g. thread buffers
    • G06F9/30127—Register windows
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30098—Register arrangements
    • G06F9/3012—Organisation of register space, e.g. banked or distributed register file
    • G06F9/3013—Organisation of register space, e.g. banked or distributed register file according to data content, e.g. floating-point registers, address registers
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3802—Instruction prefetching
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3824—Operand accessing
    • G06F9/383—Operand prefetching
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3824—Operand accessing
    • G06F9/3834—Maintaining memory consistency
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G06F9/3842—Speculative instruction execution
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G06F9/3851—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution from multiple instruction streams, e.g. multistreaming
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3885—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Multimedia (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Advance Control (AREA)
  • Executing Machine-Instructions (AREA)
  • Multi Processors (AREA)
DE60005002T 1999-05-11 2000-05-09 Vertikal-threaded prozessor mit multidimensionalem speicher Expired - Lifetime DE60005002T2 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US09/309,731 US6351808B1 (en) 1999-05-11 1999-05-11 Vertically and horizontally threaded processor with multidimensional storage for storing thread data
US309731 1999-05-11
PCT/US2000/012798 WO2000068821A2 (en) 1999-05-11 2000-05-09 Vertically-threaded processor with multi-dimensional storage

Publications (2)

Publication Number Publication Date
DE60005002D1 true DE60005002D1 (de) 2003-10-09
DE60005002T2 DE60005002T2 (de) 2004-07-08

Family

ID=23199433

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60005002T Expired - Lifetime DE60005002T2 (de) 1999-05-11 2000-05-09 Vertikal-threaded prozessor mit multidimensionalem speicher

Country Status (4)

Country Link
US (1) US6351808B1 (de)
EP (2) EP1185939B1 (de)
DE (1) DE60005002T2 (de)
WO (1) WO2000068821A2 (de)

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US7681018B2 (en) * 2000-08-31 2010-03-16 Intel Corporation Method and apparatus for providing large register address space while maximizing cycletime performance for a multi-threaded register file set
US6629237B2 (en) * 2000-09-01 2003-09-30 Intel Corporation Solving parallel problems employing hardware multi-threading in a parallel processing environment
US7225281B2 (en) * 2001-08-27 2007-05-29 Intel Corporation Multiprocessor infrastructure for providing flexible bandwidth allocation via multiple instantiations of separate data buses, control buses and support mechanisms
US6968445B2 (en) * 2001-12-20 2005-11-22 Sandbridge Technologies, Inc. Multithreaded processor with efficient processing for convergence device applications
US7363474B2 (en) * 2001-12-31 2008-04-22 Intel Corporation Method and apparatus for suspending execution of a thread until a specified memory access occurs
US7127561B2 (en) * 2001-12-31 2006-10-24 Intel Corporation Coherency techniques for suspending execution of a thread until a specified memory access occurs
US7610451B2 (en) * 2002-01-25 2009-10-27 Intel Corporation Data transfer mechanism using unidirectional pull bus and push bus
US7337275B2 (en) * 2002-08-13 2008-02-26 Intel Corporation Free list and ring data structure management
US6925643B2 (en) * 2002-10-11 2005-08-02 Sandbridge Technologies, Inc. Method and apparatus for thread-based memory access in a multithreaded processor
JP2004220070A (ja) * 2003-01-09 2004-08-05 Japan Science & Technology Agency コンテキスト切り替え方法及び装置、中央演算装置、コンテキスト切り替えプログラム及びそれを記憶したコンピュータ読み取り可能な記憶媒体
US20040154010A1 (en) * 2003-01-31 2004-08-05 Pedro Marcuello Control-quasi-independent-points guided speculative multithreading
US7614056B1 (en) 2003-09-12 2009-11-03 Sun Microsystems, Inc. Processor specific dispatching in a heterogeneous configuration
WO2005057365A2 (en) 2003-12-08 2005-06-23 Ebay Inc. System to automatically regenerate software code
US20050132363A1 (en) * 2003-12-16 2005-06-16 Vijay Tewari Method, apparatus and system for optimizing context switching between virtual machines
US20050132367A1 (en) * 2003-12-16 2005-06-16 Vijay Tewari Method, apparatus and system for proxying, aggregating and optimizing virtual machine information for network-based management
US20050132364A1 (en) * 2003-12-16 2005-06-16 Vijay Tewari Method, apparatus and system for optimizing context switching between virtual machines
US8427490B1 (en) 2004-05-14 2013-04-23 Nvidia Corporation Validating a graphics pipeline using pre-determined schedules
US8624906B2 (en) * 2004-09-29 2014-01-07 Nvidia Corporation Method and system for non stalling pipeline instruction fetching from memory
US8725990B1 (en) 2004-11-15 2014-05-13 Nvidia Corporation Configurable SIMD engine with high, low and mixed precision modes
US9606821B2 (en) 2004-12-17 2017-03-28 Intel Corporation Virtual environment manager for creating and managing virtual machine environments
US7735081B2 (en) * 2004-12-17 2010-06-08 Intel Corporation Method, apparatus and system for transparent unification of virtual machines
US20060143617A1 (en) * 2004-12-29 2006-06-29 Knauerhase Robert C Method, apparatus and system for dynamic allocation of virtual platform resources
US7600101B2 (en) * 2005-01-13 2009-10-06 Hewlett-Packard Development Company, L.P. Multithreaded hardware systems and methods
CN100520714C (zh) * 2005-01-25 2009-07-29 Nxp股份有限公司 多线程处理器
WO2006098135A1 (ja) * 2005-03-14 2006-09-21 Matsushita Electric Industrial Co., Ltd. バスコントローラ
US9092170B1 (en) 2005-10-18 2015-07-28 Nvidia Corporation Method and system for implementing fragment operation processing across a graphics bus interconnect
US8533710B1 (en) * 2006-08-31 2013-09-10 Oracle America, Inc. Using observed thread activity to dynamically tune a virtual machine for responsiveness
US8683126B2 (en) 2007-07-30 2014-03-25 Nvidia Corporation Optimal use of buffer space by a storage controller which writes retrieved data directly to a memory
US8698819B1 (en) 2007-08-15 2014-04-15 Nvidia Corporation Software assisted shader merging
US9024957B1 (en) 2007-08-15 2015-05-05 Nvidia Corporation Address independent shader program loading
US8411096B1 (en) 2007-08-15 2013-04-02 Nvidia Corporation Shader program instruction fetch
US8659601B1 (en) 2007-08-15 2014-02-25 Nvidia Corporation Program sequencer for generating indeterminant length shader programs for a graphics processor
US9064333B2 (en) 2007-12-17 2015-06-23 Nvidia Corporation Interrupt handling techniques in the rasterizer of a GPU
US8780123B2 (en) 2007-12-17 2014-07-15 Nvidia Corporation Interrupt handling techniques in the rasterizer of a GPU
US8681861B2 (en) 2008-05-01 2014-03-25 Nvidia Corporation Multistandard hardware video encoder
US8923385B2 (en) 2008-05-01 2014-12-30 Nvidia Corporation Rewind-enabled hardware encoder
US8489851B2 (en) * 2008-12-11 2013-07-16 Nvidia Corporation Processing of read requests in a memory controller using pre-fetch mechanism
US8397088B1 (en) 2009-07-21 2013-03-12 The Research Foundation Of State University Of New York Apparatus and method for efficient estimation of the energy dissipation of processor based systems
US10516383B1 (en) 2018-08-24 2019-12-24 Groq, Inc. Reducing power consumption in a processor circuit

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Also Published As

Publication number Publication date
EP1383040A2 (de) 2004-01-21
WO2000068821B1 (en) 2001-09-27
US6351808B1 (en) 2002-02-26
EP1383040A3 (de) 2007-08-22
EP1185939A2 (de) 2002-03-13
WO2000068821A3 (en) 2001-08-02
EP1185939B1 (de) 2003-09-03
DE60005002T2 (de) 2004-07-08
WO2000068821A2 (en) 2000-11-16

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8328 Change in the person/name/address of the agent

Representative=s name: BOECK, TAPPE, KIRSCHNER RECHTSANWAELTE PATENTANWAELTE