DE50212016D1 - - Google Patents

Info

Publication number
DE50212016D1
DE50212016D1 DE50212016T DE50212016T DE50212016D1 DE 50212016 D1 DE50212016 D1 DE 50212016D1 DE 50212016 T DE50212016 T DE 50212016T DE 50212016 T DE50212016 T DE 50212016T DE 50212016 D1 DE50212016 D1 DE 50212016D1
Authority
DE
Germany
Prior art keywords
silicon layer
optical
shielding
integrated circuit
electrical
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE50212016T
Other languages
German (de)
English (en)
Inventor
Christian Aumueller
Marcus Janke
Peter Hofreiter
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Infineon Technologies AG
Original Assignee
Infineon Technologies AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Infineon Technologies AG filed Critical Infineon Technologies AG
Application granted granted Critical
Publication of DE50212016D1 publication Critical patent/DE50212016D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/57—Protection from inspection, reverse engineering or tampering
    • H01L23/573—Protection from inspection, reverse engineering or tampering using passive means
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Optical Integrated Circuits (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
DE50212016T 2001-02-08 2002-02-08 Expired - Lifetime DE50212016D1 (enExample)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE10105725A DE10105725B4 (de) 2001-02-08 2001-02-08 Halbleiterchip mit einem Substrat, einer integrierten Schaltung und einer Abschirmvorrichtung
PCT/DE2002/000470 WO2002063687A2 (de) 2001-02-08 2002-02-08 Abschirmvorrichtung für integrierte schaltungen

Publications (1)

Publication Number Publication Date
DE50212016D1 true DE50212016D1 (enExample) 2008-05-15

Family

ID=7673280

Family Applications (2)

Application Number Title Priority Date Filing Date
DE10105725A Expired - Fee Related DE10105725B4 (de) 2001-02-08 2001-02-08 Halbleiterchip mit einem Substrat, einer integrierten Schaltung und einer Abschirmvorrichtung
DE50212016T Expired - Lifetime DE50212016D1 (enExample) 2001-02-08 2002-02-08

Family Applications Before (1)

Application Number Title Priority Date Filing Date
DE10105725A Expired - Fee Related DE10105725B4 (de) 2001-02-08 2001-02-08 Halbleiterchip mit einem Substrat, einer integrierten Schaltung und einer Abschirmvorrichtung

Country Status (5)

Country Link
US (1) US6919618B2 (enExample)
EP (1) EP1358676B1 (enExample)
AT (1) ATE391343T1 (enExample)
DE (2) DE10105725B4 (enExample)
WO (1) WO2002063687A2 (enExample)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10337256A1 (de) * 2002-11-21 2004-06-09 Giesecke & Devrient Gmbh Integrierte Schaltkreisanordnung und Verfahren zur Herstellung derselben
FR2893183B1 (fr) * 2005-11-10 2008-01-25 Gemplus Sa Procede de protection d'un composant electronique contre les attaques par injection de faute
EP2232412B1 (en) * 2007-08-02 2019-03-06 Nxp B.V. Tamper-resistant semiconductor device and methods of manufacturing thereof
FR2950997B1 (fr) * 2009-10-05 2011-12-09 St Microelectronics Rousset Puce de circuit integre protegee contre des attaques laser
FR2951016B1 (fr) * 2009-10-05 2012-07-13 St Microelectronics Rousset Procede de protection d'une puce de circuit integre contre des attaques laser
EP2306518B1 (fr) * 2009-10-05 2014-12-31 STMicroelectronics (Rousset) SAS Méthode de protection d'une puce de circuit intégré contre une analyse par attaques laser
FR2980636B1 (fr) 2011-09-22 2016-01-08 St Microelectronics Rousset Protection d'un dispositif electronique contre une attaque laser en face arriere, et support semiconducteur correspondant
US9653410B1 (en) 2016-03-15 2017-05-16 Nxp Usa, Inc. Transistor with shield structure, packaged device, and method of manufacture
FR3051600B1 (fr) * 2016-05-20 2018-12-07 Commissariat A L'energie Atomique Et Aux Energies Alternatives Dispositif electronique a identification de type puf
US9741671B1 (en) 2016-11-10 2017-08-22 Nxp B.V. Semiconductor die with backside protection
US10593619B1 (en) 2018-08-28 2020-03-17 Nsp Usa, Inc. Transistor shield structure, packaged device, and method of manufacture

Family Cites Families (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4179310A (en) * 1978-07-03 1979-12-18 National Semiconductor Corporation Laser trim protection process
US5306942A (en) * 1989-10-11 1994-04-26 Nippondenso Co., Ltd. Semiconductor device having a shield which is maintained at a reference potential
JP3003188B2 (ja) * 1990-09-10 2000-01-24 ソニー株式会社 半導体メモリ及びその製造方法
US5825042A (en) * 1993-06-18 1998-10-20 Space Electronics, Inc. Radiation shielding of plastic integrated circuits
KR100294026B1 (ko) * 1993-06-24 2001-09-17 야마자끼 순페이 전기광학장치
US5567967A (en) * 1993-06-28 1996-10-22 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device having a crystallized island semiconductor layer
US5525531A (en) 1995-06-05 1996-06-11 International Business Machines Corporation SOI DRAM with field-shield isolation
US5986331A (en) * 1996-05-30 1999-11-16 Philips Electronics North America Corp. Microwave monolithic integrated circuit with coplaner waveguide having silicon-on-insulator composite substrate
US5742082A (en) * 1996-11-22 1998-04-21 Motorola, Inc. Stable FET with shielding region in the substrate
ATE254803T1 (de) * 1997-09-19 2003-12-15 Fraunhofer Ges Forschung Verdrahtungsverfahren für halbleiter-bauelemente zur verhinderung von produktpiraterie und produktmanipulation, durch das verfahren hergestelltes halbleiter-bauelement und verwendung des halbleiter-bauelements in einer chipkarte
US6066860A (en) * 1997-12-25 2000-05-23 Seiko Epson Corporation Substrate for electro-optical apparatus, electro-optical apparatus, method for driving electro-optical apparatus, electronic device and projection display device
JP3583633B2 (ja) * 1998-12-21 2004-11-04 シャープ株式会社 半導体装置の製造方法
KR100294640B1 (ko) * 1998-12-24 2001-08-07 박종섭 부동 몸체 효과를 제거한 실리콘 이중막 소자 및 그 제조방법
WO2000067319A1 (de) * 1999-05-03 2000-11-09 Infineon Technologies Ag Verfahren und vorrichtung zur sicherung eines mehrdimensional aufgebauten chipstapels
DE19940759B4 (de) * 1999-08-27 2004-04-15 Infineon Technologies Ag Schaltungsanordnung und Verfahren zu deren Herstellung
DE10003112C1 (de) * 2000-01-13 2001-07-26 Infineon Technologies Ag Chip mit allseitigem Schutz sensitiver Schaltungsteile vor Zugriff durch Nichtberechtigte durch Abschirmanordnungen (Shields) unter Verwendung eines Hilfschips
JP3604002B2 (ja) * 2000-06-02 2004-12-22 シャープ株式会社 半導体装置
JP2002353424A (ja) * 2001-03-23 2002-12-06 Seiko Epson Corp 基板装置の製造方法及び基板装置、電気光学装置の製造方法及び電気光学装置、並びに電子機器

Also Published As

Publication number Publication date
DE10105725A1 (de) 2002-09-05
US20040124524A1 (en) 2004-07-01
WO2002063687A3 (de) 2003-05-30
DE10105725B4 (de) 2008-11-13
WO2002063687A2 (de) 2002-08-15
EP1358676A2 (de) 2003-11-05
US6919618B2 (en) 2005-07-19
ATE391343T1 (de) 2008-04-15
EP1358676B1 (de) 2008-04-02

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition