DE502005005490D1 - Verfahren und vorrichtung zur überwachung einer sp - Google Patents
Verfahren und vorrichtung zur überwachung einer spInfo
- Publication number
- DE502005005490D1 DE502005005490D1 DE502005005490T DE502005005490T DE502005005490D1 DE 502005005490 D1 DE502005005490 D1 DE 502005005490D1 DE 502005005490 T DE502005005490 T DE 502005005490T DE 502005005490 T DE502005005490 T DE 502005005490T DE 502005005490 D1 DE502005005490 D1 DE 502005005490D1
- Authority
- DE
- Germany
- Prior art keywords
- changeover
- switchover
- monitoring
- unit
- clock
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 238000000034 method Methods 0.000 title abstract 2
- 238000012544 monitoring process Methods 0.000 title 1
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30181—Instruction operation extension or modification
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30181—Instruction operation extension or modification
- G06F9/30189—Instruction operation extension or modification according to execution mode, e.g. mode flag
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/16—Error detection or correction of the data by redundancy in hardware
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/16—Error detection or correction of the data by redundancy in hardware
- G06F11/1629—Error detection by comparing the output of redundant processing systems
- G06F11/1641—Error detection by comparing the output of redundant processing systems where the comparison is not performed by the redundant processing components
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/16—Error detection or correction of the data by redundancy in hardware
- G06F11/1695—Error detection or correction of the data by redundancy in hardware which are operating with time diversity
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/30—Monitoring
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/16—Protection against loss of memory contents
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
- G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
- G06F9/3851—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution from multiple instruction streams, e.g. multistreaming
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
- G06F9/3885—Concurrent instruction execution, e.g. pipeline, look ahead using a plurality of independent parallel functional units
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2201/00—Indexing scheme relating to error detection, to error correction, and to monitoring
- G06F2201/845—Systems in which the redundancy can be transformed in increased performance
Applications Claiming Priority (6)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| DE200410051952 DE102004051952A1 (de) | 2004-10-25 | 2004-10-25 | Verfahren zur Datenverteilung und Datenverteilungseinheit in einem Mehrprozessorsystem |
| DE200410051950 DE102004051950A1 (de) | 2004-10-25 | 2004-10-25 | Verfahren und Vorrichtung zur Taktumschaltung bei einem Mehrprozessorsystem |
| DE200410051992 DE102004051992A1 (de) | 2004-10-25 | 2004-10-25 | Verfahren und Vorrichtung zur Verzögerung von Zugriffen auf Daten und/oder Befehle eines Mehrprozessorsystems |
| DE200410051964 DE102004051964A1 (de) | 2004-10-25 | 2004-10-25 | Verfahren und Vorrichtung zur Überwachung einer Speichereinheit in einem Mehrprozessorsystem |
| DE200410051937 DE102004051937A1 (de) | 2004-10-25 | 2004-10-25 | Verfahren und Vorrichtung zur Synchronisierung in einem Mehrprozessorsystem |
| PCT/EP2005/055538 WO2006045801A2 (de) | 2004-10-25 | 2005-10-25 | Verfahren und vorrichtung zur überwachung einer speichereinheit in einem mehrprozessorsystem |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| DE502005005490D1 true DE502005005490D1 (de) | 2008-11-06 |
Family
ID=35677569
Family Applications (2)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| DE502005005284T Active DE502005005284D1 (de) | 2004-10-25 | 2005-10-25 | Verfahren und vorrichtung zur synchronisierung in einem mehrprozessorsystem |
| DE502005005490T Active DE502005005490D1 (de) | 2004-10-25 | 2005-10-25 | Verfahren und vorrichtung zur überwachung einer sp |
Family Applications Before (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| DE502005005284T Active DE502005005284D1 (de) | 2004-10-25 | 2005-10-25 | Verfahren und vorrichtung zur synchronisierung in einem mehrprozessorsystem |
Country Status (8)
| Country | Link |
|---|---|
| US (4) | US7853819B2 (de) |
| EP (5) | EP1810145B1 (de) |
| JP (5) | JP2008518311A (de) |
| KR (4) | KR20070083772A (de) |
| AT (2) | ATE407398T1 (de) |
| DE (2) | DE502005005284D1 (de) |
| RU (1) | RU2007119316A (de) |
| WO (5) | WO2006045801A2 (de) |
Families Citing this family (26)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7882379B2 (en) * | 2006-09-22 | 2011-02-01 | Sony Computer Entertainment Inc. | Power consumption reduction in a multiprocessor system |
| US20080244305A1 (en) * | 2007-03-30 | 2008-10-02 | Texas Instruments Deutschland, Gmbh | Delayed lock-step cpu compare |
| DE102007063291A1 (de) * | 2007-12-27 | 2009-07-02 | Robert Bosch Gmbh | Sicherheitssteuerung |
| JP4633134B2 (ja) * | 2008-03-27 | 2011-02-16 | ルネサスエレクトロニクス株式会社 | マイクロコントローラ、制御システム及びマイクロコントローラの設計方法 |
| US7941698B1 (en) * | 2008-04-30 | 2011-05-10 | Hewlett-Packard Development Company, L.P. | Selective availability in processor systems |
| JP2010198131A (ja) * | 2009-02-23 | 2010-09-09 | Renesas Electronics Corp | プロセッサシステム、及びプロセッサシステムの動作モード切り替え方法 |
| US8275977B2 (en) * | 2009-04-08 | 2012-09-25 | Freescale Semiconductor, Inc. | Debug signaling in a multiple processor data processing system |
| US8295287B2 (en) * | 2010-01-27 | 2012-10-23 | National Instruments Corporation | Network traffic shaping for reducing bus jitter on a real time controller |
| US8954714B2 (en) * | 2010-02-01 | 2015-02-10 | Altera Corporation | Processor with cycle offsets and delay lines to allow scheduling of instructions through time |
| US9052887B2 (en) | 2010-02-16 | 2015-06-09 | Freescale Semiconductor, Inc. | Fault tolerance of data processing steps operating in either a parallel operation mode or a non-synchronous redundant operation mode |
| KR101664108B1 (ko) | 2010-04-13 | 2016-10-11 | 삼성전자주식회사 | 멀티 코어의 동기화를 효율적으로 처리하기 위한 하드웨어 가속 장치 및 방법 |
| JP5718600B2 (ja) * | 2010-09-10 | 2015-05-13 | 日本電気通信システム株式会社 | 情報処理システム、および、情報処理方法 |
| US8683251B2 (en) | 2010-10-15 | 2014-03-25 | International Business Machines Corporation | Determining redundancy of power feeds connecting a server to a power supply |
| JP5796311B2 (ja) * | 2011-03-15 | 2015-10-21 | オムロン株式会社 | 制御装置およびシステムプログラム |
| EP2701073B1 (de) | 2011-04-18 | 2018-01-24 | Fujitsu Limited | Threadverarbeitungsverfahren und threadverarbeitungssystem |
| US9086977B2 (en) * | 2011-04-19 | 2015-07-21 | Freescale Semiconductor, Inc. | Cache memory with dynamic lockstep support |
| US9842014B2 (en) | 2012-11-22 | 2017-12-12 | Nxp Usa, Inc. | Data processing device, method of execution error detection and integrated circuit |
| US9429981B2 (en) * | 2013-03-05 | 2016-08-30 | St-Ericsson Sa | CPU current ripple and OCV effect mitigation |
| US9823983B2 (en) | 2014-09-25 | 2017-11-21 | Nxp Usa, Inc. | Electronic fault detection unit |
| WO2016087175A1 (de) * | 2014-12-01 | 2016-06-09 | Continental Teves Ag & Co. Ohg | Rechensystem für ein kraftfahrzeugsystem |
| JP6516097B2 (ja) * | 2015-06-11 | 2019-05-22 | 大日本印刷株式会社 | 演算装置、ｉｃカード、演算方法、及び演算処理プログラム |
| JP2019061392A (ja) | 2017-09-26 | 2019-04-18 | ルネサスエレクトロニクス株式会社 | マイクロコントローラ及びマイクロコントローラの制御方法 |
| US10642826B1 (en) | 2018-08-30 | 2020-05-05 | Gravic, Inc. | Mixed-mode method for combining active/active and validation architectures utilizing a check integrity module |
| US11269799B2 (en) * | 2019-05-03 | 2022-03-08 | Arm Limited | Cluster of processing elements having split mode and lock mode |
| US11899547B2 (en) * | 2021-11-30 | 2024-02-13 | Mellanox Technologies, Ltd. | Transaction based fault tolerant computing system |
| US20230259433A1 (en) * | 2022-02-11 | 2023-08-17 | Stmicroelectronics S.R.L. | Systems and methods to test an asychronous finite machine |
Family Cites Families (34)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE1269827B (de) * | 1965-09-09 | 1968-06-06 | Siemens Ag | Verfahren und Zusatzeinrichtung zur Synchronisierung von parallel arbeitenden Datenverarbeitungsanlagen |
| US3783250A (en) * | 1972-02-25 | 1974-01-01 | Nasa | Adaptive voting computer system |
| US4823256A (en) * | 1984-06-22 | 1989-04-18 | American Telephone And Telegraph Company, At&T Bell Laboratories | Reconfigurable dual processor system |
| AU616213B2 (en) * | 1987-11-09 | 1991-10-24 | Tandem Computers Incorporated | Method and apparatus for synchronizing a plurality of processors |
| US6038584A (en) * | 1989-11-17 | 2000-03-14 | Texas Instruments Incorporated | Synchronized MIMD multi-processing system and method of operation |
| US5226152A (en) * | 1990-12-07 | 1993-07-06 | Motorola, Inc. | Functional lockstep arrangement for redundant processors |
| DE4104114C2 (de) * | 1991-02-11 | 2000-06-08 | Siemens Ag | Redundantes Datenverarbeitungssystem |
| JPH05128080A (ja) * | 1991-10-14 | 1993-05-25 | Mitsubishi Electric Corp | 情報処理装置 |
| US5751932A (en) * | 1992-12-17 | 1998-05-12 | Tandem Computers Incorporated | Fail-fast, fail-functional, fault-tolerant multiprocessor system |
| JPH07121483A (ja) * | 1993-10-28 | 1995-05-12 | Nec Eng Ltd | 共有メモリアクセス制御回路 |
| US5758132A (en) | 1995-03-29 | 1998-05-26 | Telefonaktiebolaget Lm Ericsson | Clock control system and method using circuitry operating at lower clock frequency for selecting and synchronizing the switching of higher frequency clock signals |
| CA2178440A1 (en) * | 1995-06-07 | 1996-12-08 | Robert W. Horst | Fail-fast, fail-functional, fault-tolerant multiprocessor system |
| JPH096733A (ja) * | 1995-06-14 | 1997-01-10 | Toshiba Corp | 並列信号処理装置 |
| JPH0973436A (ja) * | 1995-09-05 | 1997-03-18 | Mitsubishi Electric Corp | 多重化計算機における動作モード切替方式 |
| US5732209A (en) * | 1995-11-29 | 1998-03-24 | Exponential Technology, Inc. | Self-testing multi-processor die with internal compare points |
| US5809522A (en) * | 1995-12-18 | 1998-09-15 | Advanced Micro Devices, Inc. | Microprocessor system with process identification tag entries to reduce cache flushing after a context switch |
| FR2748136B1 (fr) * | 1996-04-30 | 1998-07-31 | Sextant Avionique | Module electronique avec architecture redondante pour controle d'integrite du fonctionnement |
| GB2317032A (en) * | 1996-09-07 | 1998-03-11 | Motorola Gmbh | Microprocessor fail-safe system |
| GB9704542D0 (en) * | 1997-03-05 | 1997-04-23 | Sgs Thomson Microelectronics | A cache coherency mechanism |
| EP0978784A1 (de) * | 1998-08-04 | 2000-02-09 | Motorola, Inc. | Verfahren zur Rechnerprogrammkodierung und Verfahren zur Fehlerbeseitigung kodierter Rechnerprogramme |
| GB2340627B (en) * | 1998-08-13 | 2000-10-04 | Plessey Telecomm | Data processing system |
| JP2000200255A (ja) * | 1999-01-07 | 2000-07-18 | Hitachi Ltd | プロセッサ間の同期化方法及び同期回路 |
| WO2000079405A1 (fr) * | 1999-06-21 | 2000-12-28 | Hitachi, Ltd. | Processeur de donnees |
| US6615366B1 (en) * | 1999-12-21 | 2003-09-02 | Intel Corporation | Microprocessor with dual execution core operable in high reliability mode |
| US6640313B1 (en) * | 1999-12-21 | 2003-10-28 | Intel Corporation | Microprocessor with high-reliability operating mode |
| US6772368B2 (en) * | 2000-12-11 | 2004-08-03 | International Business Machines Corporation | Multiprocessor with pair-wise high reliability mode, and method therefore |
| DE10136335B4 (de) * | 2001-07-26 | 2007-03-22 | Infineon Technologies Ag | Prozessor mit mehreren Rechenwerken |
| US6947047B1 (en) * | 2001-09-20 | 2005-09-20 | Nvidia Corporation | Method and system for programmable pipelined graphics processing with branching instructions |
| US20040076189A1 (en) * | 2002-10-17 | 2004-04-22 | International Business Machines Corporation | Multiphase clocking method and apparatus |
| US7055060B2 (en) * | 2002-12-19 | 2006-05-30 | Intel Corporation | On-die mechanism for high-reliability processor |
| JP2004234144A (ja) * | 2003-01-29 | 2004-08-19 | Hitachi Ltd | プロセッサの動作比較装置および動作比較方法 |
| US20070277023A1 (en) * | 2003-06-24 | 2007-11-29 | Reinhard Weiberle | Method For Switching Over Between At Least Two Operating Modes Of A Processor Unit, As Well Corresponding Processor Unit |
| US7134031B2 (en) * | 2003-08-04 | 2006-11-07 | Arm Limited | Performance control within a multi-processor system |
| DE10349581A1 (de) * | 2003-10-24 | 2005-05-25 | Robert Bosch Gmbh | Verfahren und Vorrichtung zur Umschaltung zwischen wenigstens zwei Betriebsmodi einer Prozessoreinheit |
-
2005
- 2005-10-25 KR KR1020077009253A patent/KR20070083772A/ko active IP Right Grant
- 2005-10-25 EP EP05797084A patent/EP1810145B1/de active Active
- 2005-10-25 WO PCT/EP2005/055538 patent/WO2006045801A2/de active IP Right Grant
- 2005-10-25 KR KR1020077009252A patent/KR20070067168A/ko not_active Application Discontinuation
- 2005-10-25 WO PCT/EP2005/055542 patent/WO2006045804A1/de active Application Filing
- 2005-10-25 AT AT05797084T patent/ATE407398T1/de not_active IP Right Cessation
- 2005-10-25 DE DE502005005284T patent/DE502005005284D1/de active Active
- 2005-10-25 JP JP2007537304A patent/JP2008518311A/ja active Pending
- 2005-10-25 EP EP05801543A patent/EP1807763B1/de not_active Not-in-force
- 2005-10-25 JP JP2007537302A patent/JP4532561B2/ja not_active Expired - Fee Related
- 2005-10-25 KR KR1020077009251A patent/KR20070062579A/ko not_active Application Discontinuation
- 2005-10-25 US US11/666,405 patent/US7853819B2/en active Active
- 2005-10-25 WO PCT/EP2005/055532 patent/WO2006045798A1/de active Application Filing
- 2005-10-25 WO PCT/EP2005/055537 patent/WO2006045800A1/de active Application Filing
- 2005-10-25 EP EP05811008A patent/EP1812861A1/de not_active Ceased
- 2005-10-25 US US11/666,407 patent/US20080126718A1/en not_active Abandoned
- 2005-10-25 RU RU2007119316/09A patent/RU2007119316A/ru not_active Application Discontinuation
- 2005-10-25 US US11/666,413 patent/US20090164826A1/en not_active Abandoned
- 2005-10-25 DE DE502005005490T patent/DE502005005490D1/de active Active
- 2005-10-25 US US11/666,406 patent/US20080163035A1/en not_active Abandoned
- 2005-10-25 EP EP05801268A patent/EP1807761A1/de not_active Ceased
- 2005-10-25 EP EP05811107A patent/EP1820102A2/de not_active Withdrawn
- 2005-10-25 JP JP2007537305A patent/JP2008518312A/ja active Pending
- 2005-10-25 JP JP2007537303A patent/JP2008518310A/ja active Pending
- 2005-10-25 AT AT05801543T patent/ATE409327T1/de not_active IP Right Cessation
- 2005-10-25 KR KR1020077009250A patent/KR20070083771A/ko not_active Application Discontinuation
- 2005-10-25 WO PCT/EP2005/055539 patent/WO2006045802A2/de active Application Filing
- 2005-10-25 JP JP2007537301A patent/JP2008518308A/ja active Pending
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| 8364 | No opposition during term of opposition |