DE410402T1 - Ein automatisches system zum anpassen der ausgangsimpedanz von schnellen cmos-treibern. - Google Patents

Ein automatisches system zum anpassen der ausgangsimpedanz von schnellen cmos-treibern.

Info

Publication number
DE410402T1
DE410402T1 DE199090114220T DE90114220T DE410402T1 DE 410402 T1 DE410402 T1 DE 410402T1 DE 199090114220 T DE199090114220 T DE 199090114220T DE 90114220 T DE90114220 T DE 90114220T DE 410402 T1 DE410402 T1 DE 410402T1
Authority
DE
Germany
Prior art keywords
adjusting
output impedance
automatic system
cmos drivers
fast cmos
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
DE199090114220T
Other languages
English (en)
Inventor
Valter Torino It Bella
Franco Alpignano Salerno (To), It
Mario Torino It Sartori
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
CSELT-CENTRO STUDI E LABORATORI TELECOMUNICAZIONI SpA TURIN/TORINO IT
Original Assignee
CSELT-CENTRO STUDI E LABORATORI TELECOMUNICAZIONI SpA TURIN/TORINO IT
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by CSELT-CENTRO STUDI E LABORATORI TELECOMUNICAZIONI SpA TURIN/TORINO IT filed Critical CSELT-CENTRO STUDI E LABORATORI TELECOMUNICAZIONI SpA TURIN/TORINO IT
Publication of DE410402T1 publication Critical patent/DE410402T1/de
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/0264—Arrangements for coupling to transmission lines
    • H04L25/0278—Arrangements for impedance matching
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0005—Modifications of input or output impedance
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175—Coupling arrangements; Interface arrangements
    • H03K19/0185—Coupling arrangements; Interface arrangements using field effect transistors only
    • H03K19/018585—Coupling arrangements; Interface arrangements using field effect transistors only programmable
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/12—Compensating for variations in line impedance
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/0264—Arrangements for coupling to transmission lines
    • H04L25/028—Arrangements specific to the transmitter end

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Power Engineering (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Logic Circuits (AREA)
  • Dc Digital Transmission (AREA)
DE199090114220T 1989-07-26 1990-07-25 Ein automatisches system zum anpassen der ausgangsimpedanz von schnellen cmos-treibern. Pending DE410402T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
IT8967631A IT1232421B (it) 1989-07-26 1989-07-26 Sistema automatico per l adattamento dell impedenza d uscita di cir cuiti di pilotaggio veloci in tecnologia cmos

Publications (1)

Publication Number Publication Date
DE410402T1 true DE410402T1 (de) 1992-04-30

Family

ID=11304063

Family Applications (2)

Application Number Title Priority Date Filing Date
DE199090114220T Pending DE410402T1 (de) 1989-07-26 1990-07-25 Ein automatisches system zum anpassen der ausgangsimpedanz von schnellen cmos-treibern.
DE69019621T Expired - Lifetime DE69019621T2 (de) 1989-07-26 1990-07-25 Ein automatisches System zum Anpassen der Ausgangsimpedanz von schnellen CMOS-Treibern.

Family Applications After (1)

Application Number Title Priority Date Filing Date
DE69019621T Expired - Lifetime DE69019621T2 (de) 1989-07-26 1990-07-25 Ein automatisches System zum Anpassen der Ausgangsimpedanz von schnellen CMOS-Treibern.

Country Status (5)

Country Link
US (1) US5095231A (de)
EP (1) EP0410402B1 (de)
CA (1) CA2022029C (de)
DE (2) DE410402T1 (de)
IT (1) IT1232421B (de)

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US5165046A (en) * 1989-11-06 1992-11-17 Micron Technology, Inc. High speed CMOS driver circuit
US5134311A (en) * 1990-06-07 1992-07-28 International Business Machines Corporation Self-adjusting impedance matching driver
DE4034043A1 (de) * 1990-10-26 1992-04-30 Standard Elektrik Lorenz Ag Schaltungsanordnung zur bereitstellung eines ausgangsstromes fuer einen datentreiber
US5194765A (en) * 1991-06-28 1993-03-16 At&T Bell Laboratories Digitally controlled element sizing
FR2681487B1 (fr) * 1991-09-16 1993-11-12 Alcatel Cit Dispositif d'adaptation d'impedance pour liaisons par lignes de transmission entre un ou plusieurs emetteurs et un ou plusieurs recepteurs de signaux.
US5268597A (en) * 1992-08-19 1993-12-07 Hyundai Electronics America Output buffer circuit with noise reduction circuit
US5473264A (en) * 1992-11-13 1995-12-05 Apple Computer, Inc. Methods and apparatus for electrically terminating a high speed communications pathway
US5334885A (en) * 1993-01-13 1994-08-02 At&T Bell Laboratories Automatic control of buffer speed
US5296756A (en) * 1993-02-08 1994-03-22 Patel Hitesh N Self adjusting CMOS transmission line driver
DE69405442T2 (de) * 1993-03-18 1998-04-02 Ncr Int Inc Übertragungsempfängerschaltkreis für eine integrierte Schaltung
US5543746A (en) * 1993-06-08 1996-08-06 National Semiconductor Corp. Programmable CMOS current source having positive temperature coefficient
WO1994029962A1 (en) * 1993-06-08 1994-12-22 National Semiconductor Corporation Cmos btl compatible bus and transmission line driver
US5557223A (en) * 1993-06-08 1996-09-17 National Semiconductor Corporation CMOS bus and transmission line driver having compensated edge rate control
KR100302890B1 (ko) * 1993-06-08 2001-11-22 클라크 3세 존 엠. 프로그램가능한cmos버스및전송라인드라이버
US5483184A (en) * 1993-06-08 1996-01-09 National Semiconductor Corporation Programmable CMOS bus and transmission line receiver
US5539341A (en) * 1993-06-08 1996-07-23 National Semiconductor Corporation CMOS bus and transmission line driver having programmable edge rate control
US5634014A (en) * 1993-06-18 1997-05-27 Digital Equipment Corporation Semiconductor process, power supply voltage and temperature compensated integrated system bus termination
KR0137108B1 (en) * 1993-06-25 1998-06-15 Hitachi Ltd Bus driving system and integrated circuit device using the same
FR2709217B1 (fr) * 1993-08-19 1995-09-15 Bull Sa Procédé et dispositif d'adaptation d'impédance pour un émetteur et/ou récepteur, circuit intégré et système de transmission les mettant en Óoeuvre.
US5448182A (en) * 1994-05-02 1995-09-05 Motorola Inc. Driver circuit with self-adjusting impedance matching
US5532616A (en) * 1994-08-01 1996-07-02 Texas Instruments Incorporated On-chip series terminated CMOS(Bi-CMOS) driver
US5578939A (en) * 1995-01-23 1996-11-26 Beers; Gregory E. Bidirectional transmission line driver/receiver
US5568064A (en) * 1995-01-23 1996-10-22 International Business Machines Corporation Bidirectional transmission line driver/receiver
US5528166A (en) * 1995-03-14 1996-06-18 Intel Corporation Pulse controlled impedance compensated output buffer
US5534812A (en) * 1995-04-21 1996-07-09 International Business Machines Corporation Communication between chips having different voltage levels
JPH0993165A (ja) * 1995-09-22 1997-04-04 Internatl Business Mach Corp <Ibm> インピーダンス整合装置
US6060905A (en) * 1996-02-07 2000-05-09 International Business Machines Corporation Variable voltage, variable impedance CMOS off-chip driver and receiver interface and circuits
US5818260A (en) * 1996-04-24 1998-10-06 National Semiconductor Corporation Transmission line driver having controllable rise and fall times with variable output low and minimal on/off delay
US8604828B1 (en) * 1996-05-31 2013-12-10 International Business Machines Corporation Variable voltage CMOS off-chip driver and receiver circuits
DE19639230C1 (de) 1996-09-24 1998-07-16 Ericsson Telefon Ab L M Ausgangspufferschaltkreis zur Ansteuerung einer Übertragungsleitung
US5923276A (en) * 1996-12-19 1999-07-13 International Business Machines Corporation Current source based multilevel bus driver and converter
US5815107A (en) * 1996-12-19 1998-09-29 International Business Machines Corporation Current source referenced high speed analog to digitial converter
US6101561A (en) * 1998-02-06 2000-08-08 International Business Machines Corporation System for providing an increase in digital data transmission rate over a parallel bus by converting binary format voltages to encoded analog format currents
WO2000057570A2 (en) * 1999-03-22 2000-09-28 University Of Southern California Line reflection reduction with energy-recovery driver
US6425097B1 (en) * 1999-05-27 2002-07-23 Sun Microsystems, Inc. Method and apparatus for testing an impedance-controlled input/output (I/O) buffer in a highly efficient manner
US6275119B1 (en) 1999-08-25 2001-08-14 Micron Technology, Inc. Method to find a value within a range using weighted subranges
US6326802B1 (en) * 1999-09-30 2001-12-04 Intel Corporation On-die adaptive arrangements for continuous process, voltage and temperature compensation
US6292407B1 (en) 1999-10-12 2001-09-18 Micron Technolgy, Inc. Method and apparatus for circuit variable updates
US6771675B1 (en) 2000-08-17 2004-08-03 International Business Machines Corporation Method for facilitating simultaneous multi-directional transmission of multiple signals between multiple circuits using a single transmission line
US7095788B1 (en) 2000-08-17 2006-08-22 International Business Machines Corporation Circuit for facilitating simultaneous multi-directional transmission of multiple signals between multiple circuits using a single transmission line
KR100391150B1 (ko) 2000-11-15 2003-07-16 삼성전자주식회사 다단의 상위 코드 선택기를 갖는 반도체 장치의 임피던스콘트롤 출력회로 및 그의 동작방법
EP1286469A1 (de) 2001-07-31 2003-02-26 Infineon Technologies AG Ausgangstreiber für integrierte Schaltungen und ein Verfahren zur Steuerung der Ausgangsimpedanz einer integrierter Schaltung
US6573747B2 (en) 2001-09-28 2003-06-03 Intel Corporation Digital update scheme for adaptive impedance control of on-die input/output circuits
US7148723B2 (en) * 2002-01-30 2006-12-12 Caterpillar Inc Common controller area network interface
DE10243603B4 (de) 2002-09-19 2007-04-19 Infineon Technologies Ag Verfahren zur Verwendung beim Trimmen, Halbleiter-Bauelement-Test-Gerät zum Durchführen des Verfahrens und Halbleiter-Bauelement-Test-System
DE10246741B4 (de) * 2002-10-07 2007-04-19 Infineon Technologies Ag Verfahren und Halbleitereinrichtung zum Abgleich von Schnittstelleneinrichtungen
US7248636B2 (en) * 2004-04-20 2007-07-24 Hewlett-Packard Development Company, L.P. Systems and methods for adjusting an output driver
US8352793B2 (en) * 2008-08-15 2013-01-08 Apple Inc. Device testing method and architecture

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US4437024A (en) * 1981-10-22 1984-03-13 Rca Corporation Actively controlled input buffer
US4620310A (en) * 1985-03-11 1986-10-28 Metapath Inc. Method and apparatus for generating bipolar pulses in a local area network
JPH0728214B2 (ja) * 1987-02-06 1995-03-29 株式会社日立製作所 半導体集積回路装置
US4825099A (en) * 1987-12-04 1989-04-25 Ford Microelectronics Feedback-controlled current output driver having reduced current surge
JPH01226213A (ja) * 1988-03-04 1989-09-08 Mitsubishi Electric Corp ドライバ回路
US4897564A (en) * 1988-12-27 1990-01-30 International Business Machines Corp. BICMOS driver circuit for high density CMOS logic circuits

Also Published As

Publication number Publication date
EP0410402A2 (de) 1991-01-30
CA2022029C (en) 1994-05-17
EP0410402A3 (en) 1992-01-08
DE69019621T2 (de) 1995-12-07
DE69019621D1 (de) 1995-06-29
EP0410402B1 (de) 1995-05-24
US5095231A (en) 1992-03-10
IT8967631A0 (it) 1989-07-26
IT1232421B (it) 1992-02-17
CA2022029A1 (en) 1991-01-27

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