DE4007978C2 - - Google Patents

Info

Publication number
DE4007978C2
DE4007978C2 DE19904007978 DE4007978A DE4007978C2 DE 4007978 C2 DE4007978 C2 DE 4007978C2 DE 19904007978 DE19904007978 DE 19904007978 DE 4007978 A DE4007978 A DE 4007978A DE 4007978 C2 DE4007978 C2 DE 4007978C2
Authority
DE
Germany
Prior art keywords
level
enable signal
low
output
variable
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE19904007978
Other languages
German (de)
English (en)
Other versions
DE4007978A1 (de
Inventor
Christopher W. Hillsboro Oreg. Us Branson
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Credence Systems Corp
Original Assignee
Tektronix Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tektronix Inc filed Critical Tektronix Inc
Publication of DE4007978A1 publication Critical patent/DE4007978A1/de
Application granted granted Critical
Publication of DE4007978C2 publication Critical patent/DE4007978C2/de
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/16—Modifications for eliminating interference voltages or currents
    • H03K17/161—Modifications for eliminating interference voltages or currents in field-effect transistor switches
    • H03K17/162—Modifications for eliminating interference voltages or currents in field-effect transistor switches without feedback from the output circuit to the control circuit
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
    • H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
    • H03K17/687—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors
    • H03K17/693—Switching arrangements with several input- or output-terminals, e.g. multiplexers, distributors
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0005—Modifications of input or output impedance
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175—Coupling arrangements; Interface arrangements
    • H03K19/0185—Coupling arrangements; Interface arrangements using field effect transistors only
    • H03K19/018557—Coupling arrangements; Impedance matching circuits
    • H03K19/018571—Coupling arrangements; Impedance matching circuits of complementary type, e.g. CMOS

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Logic Circuits (AREA)
  • Electronic Switches (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Dc Digital Transmission (AREA)
DE19904007978 1989-03-17 1990-03-13 Ausgangstreiber-schaltungsanordnung zur minimierung von uebergangsimpedanzschwankungen und verfahren zur minimierung von impedanzfehlanpassungen Granted DE4007978A1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US32526389A 1989-03-17 1989-03-17

Publications (2)

Publication Number Publication Date
DE4007978A1 DE4007978A1 (de) 1990-09-20
DE4007978C2 true DE4007978C2 (enExample) 1993-08-05

Family

ID=23267137

Family Applications (1)

Application Number Title Priority Date Filing Date
DE19904007978 Granted DE4007978A1 (de) 1989-03-17 1990-03-13 Ausgangstreiber-schaltungsanordnung zur minimierung von uebergangsimpedanzschwankungen und verfahren zur minimierung von impedanzfehlanpassungen

Country Status (3)

Country Link
JP (1) JPH07109984B2 (enExample)
DE (1) DE4007978A1 (enExample)
FR (1) FR2644650B1 (enExample)

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61170130A (ja) * 1985-01-24 1986-07-31 Seikosha Co Ltd 出力インバ−タの貫通電流防止回路
US4707620A (en) * 1986-07-22 1987-11-17 Tektronix, Inc. Adjustable impedance driver network
US4712058A (en) * 1986-07-22 1987-12-08 Tektronix, Inc. Active load network

Also Published As

Publication number Publication date
DE4007978A1 (de) 1990-09-20
JPH02280522A (ja) 1990-11-16
FR2644650B1 (fr) 1993-07-16
FR2644650A1 (fr) 1990-09-21
JPH07109984B2 (ja) 1995-11-22

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Legal Events

Date Code Title Description
OP8 Request for examination as to paragraph 44 patent law
D2 Grant after examination
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: CREDENCE SYSTEMS CORP. (N.D.GESETZEN D.STAATES DEL

8339 Ceased/non-payment of the annual fee