DE3877467T2 - Selbstkorrigierendes halbleiterspeichergeraet und mikrorechner mit einem solchen geraet. - Google Patents

Selbstkorrigierendes halbleiterspeichergeraet und mikrorechner mit einem solchen geraet.

Info

Publication number
DE3877467T2
DE3877467T2 DE8888114183T DE3877467T DE3877467T2 DE 3877467 T2 DE3877467 T2 DE 3877467T2 DE 8888114183 T DE8888114183 T DE 8888114183T DE 3877467 T DE3877467 T DE 3877467T DE 3877467 T2 DE3877467 T2 DE 3877467T2
Authority
DE
Germany
Prior art keywords
self
semiconductor storage
correcting
micro computer
error
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE8888114183T
Other languages
English (en)
Other versions
DE3877467D1 (de
Inventor
Kikuzo C O Oki Electric Sawada
Kouzi C O Oki Electri Tanagawa
Nobuhiro C O Oki Electr Tomari
Tomoaki C O Oki Electr Yoshida
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Oki Electric Industry Co Ltd
Original Assignee
Oki Electric Industry Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Oki Electric Industry Co Ltd filed Critical Oki Electric Industry Co Ltd
Publication of DE3877467D1 publication Critical patent/DE3877467D1/de
Application granted granted Critical
Publication of DE3877467T2 publication Critical patent/DE3877467T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1008Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1076Parity data used in redundant arrays of independent storages, e.g. in RAID systems
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/02Detection or location of defective auxiliary circuits, e.g. defective refresh counters
    • G11C29/028Detection or location of defective auxiliary circuits, e.g. defective refresh counters with adaption or trimming of parameters
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/50Marginal testing, e.g. race, voltage or current testing
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/50Marginal testing, e.g. race, voltage or current testing
    • G11C29/50016Marginal testing, e.g. race, voltage or current testing of retention
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2201/00Indexing scheme relating to error detection, to error correction, and to monitoring
    • G06F2201/81Threshold
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/04Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Read Only Memory (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
DE8888114183T 1987-08-31 1988-08-31 Selbstkorrigierendes halbleiterspeichergeraet und mikrorechner mit einem solchen geraet. Expired - Fee Related DE3877467T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP21754487 1987-08-31
JP63141401A JP2509297B2 (ja) 1987-08-31 1988-06-08 自己訂正機能付半導体記憶装置及びマイクロコンピュ―タ

Publications (2)

Publication Number Publication Date
DE3877467D1 DE3877467D1 (de) 1993-02-25
DE3877467T2 true DE3877467T2 (de) 1993-08-12

Family

ID=26473647

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8888114183T Expired - Fee Related DE3877467T2 (de) 1987-08-31 1988-08-31 Selbstkorrigierendes halbleiterspeichergeraet und mikrorechner mit einem solchen geraet.

Country Status (4)

Country Link
US (1) US4901320A (de)
EP (1) EP0305987B1 (de)
JP (1) JP2509297B2 (de)
DE (1) DE3877467T2 (de)

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DE69033262T2 (de) * 1989-04-13 2000-02-24 Sandisk Corp EEPROM-Karte mit Austauch von fehlerhaften Speicherzellen und Zwischenspeicher
JPH0664918B2 (ja) * 1989-05-25 1994-08-22 ローム株式会社 自己訂正機能を有する半導体記憶装置
JP2835107B2 (ja) * 1989-11-16 1998-12-14 沖電気工業株式会社 不揮発性半導体記憶装置のエラー訂正回路及びそのエラー訂正方法
US5134616A (en) * 1990-02-13 1992-07-28 International Business Machines Corporation Dynamic ram with on-chip ecc and optimized bit and word redundancy
JPH04141900A (ja) * 1990-10-01 1992-05-15 Nec Ic Microcomput Syst Ltd 半導体集積回路
JP3171599B2 (ja) * 1991-03-05 2001-05-28 沖電気工業株式会社 半導体記憶装置
US5504760A (en) * 1991-03-15 1996-04-02 Sandisk Corporation Mixed data encoding EEPROM system
WO1992019046A1 (en) * 1991-04-15 1992-10-29 Motorola Gmbh EEPROM MEMORY SYSTEMS FOR 'n OUT OF m' CODES
US5450354A (en) * 1992-08-31 1995-09-12 Nippon Steel Corporation Non-volatile semiconductor memory device detachable deterioration of memory cells
US5883903A (en) * 1993-09-20 1999-03-16 Fujitsu Limited Semiconductor memory of XN type having parity corresponding to n×m bits
DE19616546C1 (de) * 1996-04-25 1997-12-11 Siemens Ag Verfahren zur Fehlerkorrektur von Datenbits in Halbleiterspeichern und Halbleiterspeicherchip zur Durchführung des Verfahrens
US5872802A (en) * 1996-05-03 1999-02-16 Cypress Semiconductor Corp. Parity generation and check circuit and method in read data path
JP3215344B2 (ja) * 1997-03-10 2001-10-02 株式会社東芝 プロセッサ及びそのバグ回避方法
DE19755384C2 (de) * 1997-12-12 2000-05-04 Siemens Ag System zum Trimmen elektronischer Bauelemente oder Sensoren
DE19916065A1 (de) 1999-04-09 2000-10-19 Siemens Ag Programmierbarer Festwertspeicher und Verfahren zum Betreiben des Festwertspeichers
FR2802697B1 (fr) * 1999-12-15 2005-03-04 St Microelectronics Sa Procede de lecture d'une cellule memoire non volatile
FR2802734B1 (fr) * 1999-12-15 2002-04-26 St Microelectronics Sa Procede de correction d'un bit dans une chaine de bits
JP4316085B2 (ja) * 1999-12-28 2009-08-19 株式会社東芝 半導体集積回路装置及び集積回路システム
JP2002074999A (ja) * 2000-08-23 2002-03-15 Sharp Corp 不揮発性半導体記憶装置
US7301961B1 (en) 2001-12-27 2007-11-27 Cypress Semiconductor Corportion Method and apparatus for configuring signal lines according to idle codes
CA2447204C (en) * 2002-11-29 2010-03-23 Memory Management Services Ltd. Error correction scheme for memory
US7615039B2 (en) * 2004-09-16 2009-11-10 Mcneil-Ppc, Inc. Body attachable drapeable sanitary absorbent napkin
JP4178248B2 (ja) * 2004-10-28 2008-11-12 富士通マイクロエレクトロニクス株式会社 半導体装置
KR20080033393A (ko) * 2005-08-11 2008-04-16 콘티넨탈 테베스 아게 운트 코. 오하게 적어도 부분적으로 안전-결정적 프로세스들을 제어 또는조정하기 위한 마이크로프로세서 시스템
JP4991131B2 (ja) * 2005-08-12 2012-08-01 株式会社東芝 半導体記憶装置
JP4660353B2 (ja) * 2005-11-01 2011-03-30 株式会社東芝 記憶媒体再生装置
DE602006006788D1 (de) 2006-03-02 2009-06-25 St Microelectronics Srl Leseverfahren eines Speichers mit eingebetteter Fehlerkorrekturkode und Speicher mit eingebetteter Fehlerkorrekturkode
US7423912B2 (en) * 2006-09-19 2008-09-09 Atmel Corporation SONOS memory array with improved read disturb characteristic
JP5422976B2 (ja) 2008-11-19 2014-02-19 富士通株式会社 半導体記憶装置
JP2010055746A (ja) * 2009-12-07 2010-03-11 Toshiba Corp 記憶媒体再生装置、記憶媒体再生方法および記憶媒体再生プログラム
US9135168B2 (en) 2010-07-07 2015-09-15 Marvell World Trade Ltd. Apparatus and method for generating descriptors to reaccess a non-volatile semiconductor memory of a storage drive due to an error
US9141538B2 (en) 2010-07-07 2015-09-22 Marvell World Trade Ltd. Apparatus and method for generating descriptors to transfer data to and from non-volatile semiconductor memory of a storage drive
US8868852B2 (en) 2010-07-07 2014-10-21 Marvell World Trade Ltd. Interface management control systems and methods for non-volatile semiconductor memory
WO2013138540A1 (en) * 2012-03-16 2013-09-19 Marvell World Trade Ltd. Architecture to allow efficient storage of data on nand flash memory
US9201727B2 (en) 2013-01-15 2015-12-01 International Business Machines Corporation Error protection for a data bus
US9041428B2 (en) 2013-01-15 2015-05-26 International Business Machines Corporation Placement of storage cells on an integrated circuit
US20140201599A1 (en) * 2013-01-15 2014-07-17 International Business Machines Corporation Error protection for integrated circuits in an insensitive direction
US9021328B2 (en) 2013-01-15 2015-04-28 International Business Machines Corporation Shared error protection for register banks
US9043683B2 (en) 2013-01-23 2015-05-26 International Business Machines Corporation Error protection for integrated circuits
CN105229592B (zh) * 2013-03-15 2018-04-10 马维尔国际贸易有限公司 用于生成用以由于错误而重新访问存储驱动器的非易失性半导体存储器的描述符的装置和方法

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US3582880A (en) * 1969-12-05 1971-06-01 Ibm Data error correction by inversion storage
DE2758390B2 (de) * 1977-12-28 1979-10-25 Siemens Ag, 1000 Berlin Und 8000 Muenchen Fehlerprüf schaltung
US4360915A (en) * 1979-02-07 1982-11-23 The Warner & Swasey Company Error detection means
JPS56120000A (en) * 1980-02-28 1981-09-19 Fujitsu Ltd Memory testing system
JPS6035760B2 (ja) * 1980-12-18 1985-08-16 富士通株式会社 半導体記憶装置
DE3205473A1 (de) * 1982-02-16 1983-08-25 Siemens AG, 1000 Berlin und 8000 München Verfahren und anordnung zur funktionspruefung eines elektrisch wortweise umprogrammierbaren speichers

Also Published As

Publication number Publication date
EP0305987A3 (en) 1990-08-01
JP2509297B2 (ja) 1996-06-19
EP0305987B1 (de) 1993-01-13
EP0305987A2 (de) 1989-03-08
US4901320A (en) 1990-02-13
DE3877467D1 (de) 1993-02-25
JPH01133300A (ja) 1989-05-25

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee