DE3854012T2 - Fehlertolerante Logikschaltung. - Google Patents

Fehlertolerante Logikschaltung.

Info

Publication number
DE3854012T2
DE3854012T2 DE3854012T DE3854012T DE3854012T2 DE 3854012 T2 DE3854012 T2 DE 3854012T2 DE 3854012 T DE3854012 T DE 3854012T DE 3854012 T DE3854012 T DE 3854012T DE 3854012 T2 DE3854012 T2 DE 3854012T2
Authority
DE
Germany
Prior art keywords
fault
logic circuit
tolerant logic
tolerant
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE3854012T
Other languages
English (en)
Other versions
DE3854012D1 (de
Inventor
Gerald Adrian Maley
Stephen Douglas Weitzel
Joseph Michael Mosley
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Application granted granted Critical
Publication of DE3854012D1 publication Critical patent/DE3854012D1/de
Publication of DE3854012T2 publication Critical patent/DE3854012T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/007—Fail-safe circuits
    • H03K19/0075—Fail-safe circuits by using two redundant chains
DE3854012T 1987-04-10 1988-02-24 Fehlertolerante Logikschaltung. Expired - Fee Related DE3854012T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/037,306 US4829198A (en) 1987-04-10 1987-04-10 Fault tolerant logical circuitry

Publications (2)

Publication Number Publication Date
DE3854012D1 DE3854012D1 (de) 1995-07-27
DE3854012T2 true DE3854012T2 (de) 1996-02-15

Family

ID=21893629

Family Applications (1)

Application Number Title Priority Date Filing Date
DE3854012T Expired - Fee Related DE3854012T2 (de) 1987-04-10 1988-02-24 Fehlertolerante Logikschaltung.

Country Status (5)

Country Link
US (1) US4829198A (de)
EP (1) EP0285789B1 (de)
JP (1) JPS63263826A (de)
CA (1) CA1278349C (de)
DE (1) DE3854012T2 (de)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5187711A (en) * 1988-09-20 1993-02-16 Fujitsu Limited Error correction method for multicarrier radio transmission system
ATE134284T1 (de) * 1989-04-28 1996-02-15 Siemens Ag Taktverteilereinrichtung
DK0543825T3 (da) * 1990-08-14 1995-03-20 Siemens Ag Indretning til interruptfordeling i et flerdatamatsystem
US5369314A (en) * 1994-02-22 1994-11-29 Altera Corporation Programmable logic device with redundant circuitry
WO1997040579A1 (en) * 1996-04-22 1997-10-30 United Technologies Corporation Radiation resistant logic circuit
US5784386A (en) * 1996-07-03 1998-07-21 General Signal Corporation Fault tolerant synchronous clock distribution
US6034536A (en) * 1997-02-05 2000-03-07 Altera Corporation Redundancy circuitry for logic circuits
US6091258A (en) * 1997-02-05 2000-07-18 Altera Corporation Redundancy circuitry for logic circuits
EP0983549B1 (de) 1997-05-23 2001-12-12 Altera Corporation (a Delaware Corporation) Redundanzschaltung für programmierbare logikanordnung mit verschachtelten eingangsschaltkreisen
US6201404B1 (en) 1998-07-14 2001-03-13 Altera Corporation Programmable logic device with redundant circuitry
US6706387B2 (en) 2001-08-16 2004-03-16 Toray Plastics (America), Inc. Easy handling ultraclear thermoplastic film
EP1820273A2 (de) * 2004-12-01 2007-08-22 Koninklijke Philips Electronics N.V. Elektronisches gerät mit logikschaltung und verfahren zum entwurf einer logikschaltung
US10886777B1 (en) * 2019-10-14 2021-01-05 Astec International Limited Redundant DC input power supplies having back-feed protection

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US2910584A (en) * 1956-08-06 1959-10-27 Digital Control Systems Inc Voted-output flip-flop unit
US3016517A (en) * 1959-05-15 1962-01-09 Bell Telephone Labor Inc Redundant logic circuitry
US3134032A (en) * 1962-03-23 1964-05-19 Westinghouse Electric Corp Error canceling decision circuit
US3305830A (en) * 1963-05-24 1967-02-21 Ibm Error correcting redundant logic circuitry
US3451042A (en) * 1964-10-14 1969-06-17 Westinghouse Electric Corp Redundant signal transmission system
GB1199931A (en) * 1966-07-21 1970-07-22 Mini Of Technology London Improvements in or relating to Redundant Binary Logic Elements
US3900741A (en) * 1973-04-26 1975-08-19 Nasa Fault tolerant clock apparatus utilizing a controlled minority of clock elements
FR2386199A1 (fr) * 1977-04-01 1978-10-27 Bailey Controle Procede d'autosignalisation des defaillances d'un module d'automatisme statique de securite et module mettant en oeuvre ledit procede
FR2420254A1 (fr) * 1978-03-17 1979-10-12 Anvar Procede de routage d'informations dans un reseau de transmission de donnees numeriques et dispositif et reseau pour la mise en oeuvre de ce procede
US4199799A (en) * 1978-03-24 1980-04-22 General Electric Company Supervisory circuit for redundant channel control systems
WO1981002821A1 (en) * 1980-03-26 1981-10-01 Y Takefuji Fault tolerant gate
US4521700A (en) * 1982-12-23 1985-06-04 International Business Machines Corporation TTL logic circuit employing feedback to improved the speed-power curve
US4719629A (en) * 1985-10-28 1988-01-12 International Business Machines Dual fault-masking redundancy logic circuits
US4709166A (en) * 1986-05-22 1987-11-24 International Business Machines Corporation Complementary cascoded logic circuit
US4723242A (en) * 1986-06-27 1988-02-02 Sperry Corporation Digital adaptive voting

Also Published As

Publication number Publication date
EP0285789B1 (de) 1995-06-21
JPH0557770B2 (de) 1993-08-24
EP0285789A3 (de) 1991-01-30
CA1278349C (en) 1990-12-27
DE3854012D1 (de) 1995-07-27
US4829198A (en) 1989-05-09
EP0285789A2 (de) 1988-10-12
JPS63263826A (ja) 1988-10-31

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee