DE3801774A1 - Hochaufloesender interpolativer analog-digital-wandler mit ueberabtastung und speziellem digital-analog-wandler in der rueckfuehrung - Google Patents
Hochaufloesender interpolativer analog-digital-wandler mit ueberabtastung und speziellem digital-analog-wandler in der rueckfuehrungInfo
- Publication number
- DE3801774A1 DE3801774A1 DE19883801774 DE3801774A DE3801774A1 DE 3801774 A1 DE3801774 A1 DE 3801774A1 DE 19883801774 DE19883801774 DE 19883801774 DE 3801774 A DE3801774 A DE 3801774A DE 3801774 A1 DE3801774 A1 DE 3801774A1
- Authority
- DE
- Germany
- Prior art keywords
- digital
- converter
- circuit arrangement
- arrangement according
- reference elements
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/06—Continuously compensating for, or preventing, undesired influence of physical parameters
- H03M1/0617—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence
- H03M1/0634—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence by averaging out the errors, e.g. using sliding scale
- H03M1/0656—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence by averaging out the errors, e.g. using sliding scale in the time domain, e.g. using intended jitter as a dither signal
- H03M1/066—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence by averaging out the errors, e.g. using sliding scale in the time domain, e.g. using intended jitter as a dither signal by continuously permuting the elements used, i.e. dynamic element matching
- H03M1/0673—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence by averaging out the errors, e.g. using sliding scale in the time domain, e.g. using intended jitter as a dither signal by continuously permuting the elements used, i.e. dynamic element matching using random selection of the elements
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/06—Continuously compensating for, or preventing, undesired influence of physical parameters
- H03M1/0617—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence
- H03M1/0634—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence by averaging out the errors, e.g. using sliding scale
- H03M1/0656—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence by averaging out the errors, e.g. using sliding scale in the time domain, e.g. using intended jitter as a dither signal
- H03M1/066—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence by averaging out the errors, e.g. using sliding scale in the time domain, e.g. using intended jitter as a dither signal by continuously permuting the elements used, i.e. dynamic element matching
- H03M1/0663—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence by averaging out the errors, e.g. using sliding scale in the time domain, e.g. using intended jitter as a dither signal by continuously permuting the elements used, i.e. dynamic element matching using clocked averaging
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/66—Digital/analogue converters
- H03M1/74—Simultaneous conversion
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/66—Digital/analogue converters
- H03M1/74—Simultaneous conversion
- H03M1/742—Simultaneous conversion using current sources as quantisation value generators
- H03M1/747—Simultaneous conversion using current sources as quantisation value generators with equal currents which are switched by unary decoded digital signals
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Analogue/Digital Conversion (AREA)
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| DE19883801774 DE3801774A1 (de) | 1988-01-22 | 1988-01-22 | Hochaufloesender interpolativer analog-digital-wandler mit ueberabtastung und speziellem digital-analog-wandler in der rueckfuehrung |
| CH16689A CH677992A5 (enExample) | 1988-01-22 | 1989-01-19 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| DE19883801774 DE3801774A1 (de) | 1988-01-22 | 1988-01-22 | Hochaufloesender interpolativer analog-digital-wandler mit ueberabtastung und speziellem digital-analog-wandler in der rueckfuehrung |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| DE3801774A1 true DE3801774A1 (de) | 1989-07-27 |
Family
ID=6345766
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| DE19883801774 Withdrawn DE3801774A1 (de) | 1988-01-22 | 1988-01-22 | Hochaufloesender interpolativer analog-digital-wandler mit ueberabtastung und speziellem digital-analog-wandler in der rueckfuehrung |
Country Status (2)
| Country | Link |
|---|---|
| CH (1) | CH677992A5 (enExample) |
| DE (1) | DE3801774A1 (enExample) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO1995019068A1 (en) * | 1994-01-06 | 1995-07-13 | Level One Communications, Inc. | Low resolution, high linearity digital-to-analog converter without trim |
| EP0597123A4 (en) * | 1992-06-01 | 1998-05-13 | DIGITAL-ANALOG CONVERTER AND ANALOG-DIGITAL CONVERTER. | |
| DE19837440A1 (de) * | 1998-08-18 | 2000-02-24 | Siemens Ag | Analog/Digital-Wandlervorrichtung und Regelvorrichtung für einen Gradientenverstärker |
| DE19748272C2 (de) * | 1997-04-15 | 2002-03-28 | Nat Semiconductor Corp | Bipolarer elementenmittelnder Digital-Analog-Wandler |
-
1988
- 1988-01-22 DE DE19883801774 patent/DE3801774A1/de not_active Withdrawn
-
1989
- 1989-01-19 CH CH16689A patent/CH677992A5/de not_active IP Right Cessation
Non-Patent Citations (2)
| Title |
|---|
| ADAMS, R. W.: Design and Implementation of an Audio 18 Bit Analog-to-Digital Converter Using Oversampling Techniques, In: J. Audio Eng. Soc., Nr. 3, 1986, S. 153-166 * |
| Weidenbruch, H. U.: Analyse der Fehler Interpola- tiver Analog/ Digital-Umsetzer, Doktorarbeit an der Universität Hannover 1985 * |
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0597123A4 (en) * | 1992-06-01 | 1998-05-13 | DIGITAL-ANALOG CONVERTER AND ANALOG-DIGITAL CONVERTER. | |
| WO1995019068A1 (en) * | 1994-01-06 | 1995-07-13 | Level One Communications, Inc. | Low resolution, high linearity digital-to-analog converter without trim |
| US5534863A (en) * | 1994-01-06 | 1996-07-09 | Level One Communications, Inc. | Low resolution, high linearity digital-to-analog converter without trim |
| DE19748272C2 (de) * | 1997-04-15 | 2002-03-28 | Nat Semiconductor Corp | Bipolarer elementenmittelnder Digital-Analog-Wandler |
| DE19837440A1 (de) * | 1998-08-18 | 2000-02-24 | Siemens Ag | Analog/Digital-Wandlervorrichtung und Regelvorrichtung für einen Gradientenverstärker |
| DE19837440C2 (de) * | 1998-08-18 | 2000-05-31 | Siemens Ag | Analog/Digital-Wandlervorrichtung und Regelvorrichtung für einen Gradientenverstärker |
| US6285304B1 (en) | 1998-08-18 | 2001-09-04 | Siemens Aktiengesellschaft | Analog-to-digital converter circuit and control device for a gradient amplifier of a magnetic resonance imaging system |
Also Published As
| Publication number | Publication date |
|---|---|
| CH677992A5 (enExample) | 1991-07-15 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| 8127 | New person/name/address of the applicant |
Owner name: ALCATEL SEL AKTIENGESELLSCHAFT, 7000 STUTTGART, DE |
|
| 8110 | Request for examination paragraph 44 | ||
| 8139 | Disposal/non-payment of the annual fee |