DE3788965D1 - Steuerungsschaltung für Zweirichtungsverschiebung mit variabler Anzahl. - Google Patents

Steuerungsschaltung für Zweirichtungsverschiebung mit variabler Anzahl.

Info

Publication number
DE3788965D1
DE3788965D1 DE87102242T DE3788965T DE3788965D1 DE 3788965 D1 DE3788965 D1 DE 3788965D1 DE 87102242 T DE87102242 T DE 87102242T DE 3788965 T DE3788965 T DE 3788965T DE 3788965 D1 DE3788965 D1 DE 3788965D1
Authority
DE
Germany
Prior art keywords
control circuit
variable number
bidirectional shift
bidirectional
shift
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE87102242T
Other languages
English (en)
Other versions
DE3788965T2 (de
Inventor
Tomoji Nukiyama
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Publication of DE3788965D1 publication Critical patent/DE3788965D1/de
Application granted granted Critical
Publication of DE3788965T2 publication Critical patent/DE3788965T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F5/00—Methods or arrangements for data conversion without changing the order or content of the data handled
    • G06F5/01—Methods or arrangements for data conversion without changing the order or content of the data handled for shifting, e.g. justifying, scaling, normalising
    • G06F5/015—Methods or arrangements for data conversion without changing the order or content of the data handled for shifting, e.g. justifying, scaling, normalising having at least two separately controlled shifting levels, e.g. using shifting matrices
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F5/00—Methods or arrangements for data conversion without changing the order or content of the data handled
    • G06F5/01—Methods or arrangements for data conversion without changing the order or content of the data handled for shifting, e.g. justifying, scaling, normalising
    • G06F5/012—Methods or arrangements for data conversion without changing the order or content of the data handled for shifting, e.g. justifying, scaling, normalising in floating-point computations

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • Complex Calculations (AREA)
DE3788965T 1986-02-18 1987-02-17 Steuerungsschaltung für Zweirichtungsverschiebung mit variabler Anzahl. Expired - Fee Related DE3788965T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61034388A JPH0650462B2 (ja) 1986-02-18 1986-02-18 シフト数制御回路

Publications (2)

Publication Number Publication Date
DE3788965D1 true DE3788965D1 (de) 1994-03-17
DE3788965T2 DE3788965T2 (de) 1994-07-07

Family

ID=12412784

Family Applications (1)

Application Number Title Priority Date Filing Date
DE3788965T Expired - Fee Related DE3788965T2 (de) 1986-02-18 1987-02-17 Steuerungsschaltung für Zweirichtungsverschiebung mit variabler Anzahl.

Country Status (4)

Country Link
US (1) US4807172A (de)
EP (1) EP0233635B1 (de)
JP (1) JPH0650462B2 (de)
DE (1) DE3788965T2 (de)

Families Citing this family (41)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01204138A (ja) * 1988-02-09 1989-08-16 Nec Corp 演算回路
JPH0776911B2 (ja) * 1988-03-23 1995-08-16 松下電器産業株式会社 浮動小数点演算装置
US4982352A (en) * 1988-06-17 1991-01-01 Bipolar Integrated Technology, Inc. Methods and apparatus for determining the absolute value of the difference between binary operands
US4999803A (en) * 1989-06-29 1991-03-12 Digital Equipment Corporation Floating point arithmetic system and method
JP2831729B2 (ja) * 1989-09-30 1998-12-02 株式会社東芝 プライオリティエンコーダおよび浮動小数点正規化装置
US5075879A (en) * 1989-10-13 1991-12-24 Motorola, Inc. Absolute value decoder
JPH03136166A (ja) * 1989-10-23 1991-06-10 Nec Corp 演算回路
US5432727A (en) * 1989-11-02 1995-07-11 Intergraph Corporation Apparatus for computing a sticky bit for a floating point arithmetic unit
US4999800A (en) * 1989-11-13 1991-03-12 Motorola, Inc. Floating point adder with pre-shifter
US5038314A (en) * 1989-11-17 1991-08-06 Digital Equipment Corporation Method and apparatus for correction of underflow and overflow
US5117384A (en) * 1990-01-24 1992-05-26 International Business Machines Corporation Method and apparatus for exponent adder
EP0474247B1 (de) * 1990-09-07 1998-12-16 Nec Corporation Schaltung zur Bestimmung des Betrags der Verschiebung in einen Gleitkommarechner, welche nur wenig Hardware braucht und mit hoher Geschwindigkeit zu betreiben ist
EP0602337A1 (de) * 1992-12-14 1994-06-22 Motorola, Inc. Schnelle Trommelverschieber
US5442576A (en) * 1994-05-26 1995-08-15 Motorola, Inc. Multibit shifting apparatus, data processor using same, and method therefor
US5477543A (en) * 1994-08-03 1995-12-19 Chromatic Research, Inc. Structure and method for shifting and reordering a plurality of data bytes
US5745744A (en) * 1995-10-12 1998-04-28 International Business Machines Corporation High speed mask generation using selection logic
US5978822A (en) * 1995-12-29 1999-11-02 Atmel Corporation Circuit for rotating, left shifting, or right shifting bits
US5987603A (en) * 1997-04-29 1999-11-16 Lsi Logic Corporation Apparatus and method for reversing bits using a shifter
US6529924B1 (en) * 2000-03-27 2003-03-04 International Business Machines Corporation Method and apparatus for generating shift amount signals for an alignment shifter
GB0112269D0 (en) * 2001-05-21 2001-07-11 Micron Technology Inc Method and circuit for alignment of floating point significands in a simd array mpp
US6934728B2 (en) * 2001-06-01 2005-08-23 Microchip Technology Incorporated Euclidean distance instructions
US7003543B2 (en) 2001-06-01 2006-02-21 Microchip Technology Incorporated Sticky z bit
US6728856B2 (en) 2001-06-01 2004-04-27 Microchip Technology Incorporated Modified Harvard architecture processor having program memory space mapped to data memory space
US20030028696A1 (en) * 2001-06-01 2003-02-06 Michael Catherwood Low overhead interrupt
US7467178B2 (en) * 2001-06-01 2008-12-16 Microchip Technology Incorporated Dual mode arithmetic saturation processing
US6976158B2 (en) * 2001-06-01 2005-12-13 Microchip Technology Incorporated Repeat instruction with interrupt
US6952711B2 (en) * 2001-06-01 2005-10-04 Microchip Technology Incorporated Maximally negative signed fractional number multiplication
US6552625B2 (en) 2001-06-01 2003-04-22 Microchip Technology Inc. Processor with pulse width modulation generator with fault input prioritization
US20030005269A1 (en) * 2001-06-01 2003-01-02 Conner Joshua M. Multi-precision barrel shifting
US6604169B2 (en) 2001-06-01 2003-08-05 Microchip Technology Incorporated Modulo addressing based on absolute offset
US7007172B2 (en) * 2001-06-01 2006-02-28 Microchip Technology Incorporated Modified Harvard architecture processor having data memory space mapped to program memory space with erroneous execution protection
US7020788B2 (en) * 2001-06-01 2006-03-28 Microchip Technology Incorporated Reduced power option
US20020184566A1 (en) * 2001-06-01 2002-12-05 Michael Catherwood Register pointer trap
US20030005268A1 (en) * 2001-06-01 2003-01-02 Catherwood Michael I. Find first bit value instruction
US6937084B2 (en) * 2001-06-01 2005-08-30 Microchip Technology Incorporated Processor with dual-deadtime pulse width modulation generator
US6601160B2 (en) 2001-06-01 2003-07-29 Microchip Technology Incorporated Dynamically reconfigurable data space
US6975679B2 (en) * 2001-06-01 2005-12-13 Microchip Technology Incorporated Configuration fuses for setting PWM options
US6985986B2 (en) * 2001-06-01 2006-01-10 Microchip Technology Incorporated Variable cycle interrupt disabling
US6552567B1 (en) 2001-09-28 2003-04-22 Microchip Technology Incorporated Functional pathway configuration at a system/IC interface
US20040021483A1 (en) * 2001-09-28 2004-02-05 Brian Boles Functional pathway configuration at a system/IC interface
US8335810B2 (en) * 2006-01-31 2012-12-18 Qualcomm Incorporated Register-based shifts for a unidirectional rotator

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL277572A (de) * 1961-04-26
US3510846A (en) * 1967-07-14 1970-05-05 Ibm Left and right shifter
US4366548A (en) * 1981-01-02 1982-12-28 Sperry Corporation Adder for exponent arithmetic
JPS5960637A (ja) * 1982-09-30 1984-04-06 Toshiba Corp 浮動小数点演算装置
JPS5979350A (ja) * 1982-10-29 1984-05-08 Toshiba Corp 浮動小数点演算装置
JPS5979495A (ja) * 1982-10-29 1984-05-08 Toshiba Corp シフト回路
JPS59188740A (ja) * 1983-04-11 1984-10-26 Hitachi Ltd フロ−テイング加算器
JPS60140422A (ja) * 1983-12-28 1985-07-25 Nec Corp 演算処理装置
US4562553A (en) * 1984-03-19 1985-12-31 Analogic Corporation Floating point arithmetic system and method with rounding anticipation
JPS6132139A (ja) * 1984-07-24 1986-02-14 Nec Corp 双方向バレルシフト回路
US4943940A (en) * 1984-09-27 1990-07-24 Advanced Micro Devices, Inc. Floating point add/subtract and multiplying assemblies sharing common normalization, rounding and exponential apparatus

Also Published As

Publication number Publication date
JPH0650462B2 (ja) 1994-06-29
EP0233635A3 (en) 1990-05-09
US4807172A (en) 1989-02-21
JPS62191920A (ja) 1987-08-22
EP0233635B1 (de) 1994-02-02
EP0233635A2 (de) 1987-08-26
DE3788965T2 (de) 1994-07-07

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee