DE3788842D1 - Anordnung von Anschlüssen für eine integrierte Schaltung mit variabler Breite. - Google Patents

Anordnung von Anschlüssen für eine integrierte Schaltung mit variabler Breite.

Info

Publication number
DE3788842D1
DE3788842D1 DE87630206T DE3788842T DE3788842D1 DE 3788842 D1 DE3788842 D1 DE 3788842D1 DE 87630206 T DE87630206 T DE 87630206T DE 3788842 T DE3788842 T DE 3788842T DE 3788842 D1 DE3788842 D1 DE 3788842D1
Authority
DE
Germany
Prior art keywords
connections
arrangement
integrated circuit
variable width
variable
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE87630206T
Other languages
English (en)
Other versions
DE3788842T2 (de
Inventor
Michael David Cusack
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Frontgrade Colorado Springs LLC
Original Assignee
United Technologies Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by United Technologies Corp filed Critical United Technologies Corp
Application granted granted Critical
Publication of DE3788842D1 publication Critical patent/DE3788842D1/de
Publication of DE3788842T2 publication Critical patent/DE3788842T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49838—Geometry or layout
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814—Conductive parts
    • H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/11—Printed elements for providing electric connections to or between printed circuits
    • H05K1/111—Pads for surface mounting, e.g. lay-out
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/095—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00 with a principal constituent of the material being a combination of two or more materials provided in the groups H01L2924/013 - H01L2924/0715
    • H01L2924/097—Glass-ceramics, e.g. devitrified glass
    • H01L2924/09701—Low temperature co-fired ceramic [LTCC]
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/03—Use of materials for the substrate
    • H05K1/0306—Inorganic insulating substrates, e.g. ceramic, glass
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/09372—Pads and lands
    • H05K2201/094—Array of pads or lands differing from one another, e.g. in size, pitch or thickness; Using different connections on the pads
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621—Components characterised by their electrical contacts
    • H05K2201/10681—Tape Carrier Package [TCP]; Flexible sheet connector
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341—Surface mounted components
    • H05K3/3421—Leaded components
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Ceramic Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Geometry (AREA)
  • Wire Bonding (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
DE87630206T 1986-10-20 1987-10-15 Anordnung von Anschlüssen für eine integrierte Schaltung mit variabler Breite. Expired - Fee Related DE3788842T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US06/920,632 US4753820A (en) 1986-10-20 1986-10-20 Variable pitch IC bond pad arrangement

Publications (2)

Publication Number Publication Date
DE3788842D1 true DE3788842D1 (de) 1994-03-03
DE3788842T2 DE3788842T2 (de) 1994-05-05

Family

ID=25444105

Family Applications (1)

Application Number Title Priority Date Filing Date
DE87630206T Expired - Fee Related DE3788842T2 (de) 1986-10-20 1987-10-15 Anordnung von Anschlüssen für eine integrierte Schaltung mit variabler Breite.

Country Status (4)

Country Link
US (1) US4753820A (de)
EP (1) EP0265367B1 (de)
JP (1) JPS63110647A (de)
DE (1) DE3788842T2 (de)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4875138A (en) * 1986-10-20 1989-10-17 United Technologies Corporation Variable pitch IC bond pad arrangement
JPS63142894A (ja) * 1986-12-06 1988-06-15 株式会社東芝 フラツトパツケ−ジ集積回路の配線基板
US4987475A (en) * 1988-02-29 1991-01-22 Digital Equipment Corporation Alignment of leads for ceramic integrated circuit packages
US5227583A (en) * 1991-08-20 1993-07-13 Microelectronic Packaging America Ceramic package and method for making same
JPH05206314A (ja) * 1991-11-12 1993-08-13 Nec Corp 半導体装置
EP0714127B1 (de) * 1991-11-28 2003-01-29 Kabushiki Kaisha Toshiba Halbleitergehäuse
JP3185480B2 (ja) * 1993-07-05 2001-07-09 富士通株式会社 Ｉｃキャリア
JPH1022299A (ja) * 1996-07-08 1998-01-23 Oki Electric Ind Co Ltd 半導体集積回路
DE19913367C1 (de) * 1999-03-24 2000-12-14 Siemens Ag Verfahren zur Herstellung einer elektrischen Schaltung
US7710739B2 (en) 2005-04-28 2010-05-04 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and display device
US9491859B2 (en) 2012-05-23 2016-11-08 Massachusetts Institute Of Technology Grid arrays with enhanced fatigue life
CN104363700B (zh) * 2014-11-13 2018-02-13 深圳市华星光电技术有限公司 印刷电路板
CN112486892B (zh) * 2020-12-15 2024-07-26 泰和电路科技（惠州）有限公司 邦定ic管控计算器的计算方法

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4396971A (en) * 1972-07-10 1983-08-02 Amdahl Corporation LSI Chip package and method
US3965552A (en) * 1972-07-24 1976-06-29 N L Industries, Inc. Process for forming internal conductors and electrodes
US3926746A (en) * 1973-10-04 1975-12-16 Minnesota Mining & Mfg Electrical interconnection for metallized ceramic arrays
US4535219A (en) * 1982-10-12 1985-08-13 Xerox Corporation Interfacial blister bonding for microinterconnections
US4546065A (en) * 1983-08-08 1985-10-08 International Business Machines Corporation Process for forming a pattern of metallurgy on the top of a ceramic substrate
US4618739A (en) * 1985-05-20 1986-10-21 General Electric Company Plastic chip carrier package
US4590095A (en) * 1985-06-03 1986-05-20 General Electric Company Nickel coating diffusion bonded to metallized ceramic body and coating method

Also Published As

Publication number Publication date
US4753820A (en) 1988-06-28
JPS63110647A (ja) 1988-05-16
DE3788842T2 (de) 1994-05-05
EP0265367A1 (de) 1988-04-27
EP0265367B1 (de) 1994-01-19

Similar Documents

Publication Publication Date Title
DE3750674D1 (de) Halbleiterintegrierte Schaltung mit Prüffunktion.
DE3773078D1 (de) Integrierte halbleiterschaltung mit testschaltung.
DE3689031D1 (de) Integrierte Halbleiterschaltung mit Prüfschaltung.
DE3789938D1 (de) Elektrische Anordnung.
DE3751376D1 (de) Schaltungselement.
DE3777906D1 (de) Diagnoseschaltung.
DE68921269D1 (de) Integrierte Prüfschaltung.
DE3585112D1 (de) Integrierte optoelektrische anordnung.
DE3789013D1 (de) Zusammengesetzter analysator-tester.
DE3769564D1 (de) Logische schaltung.
DE3788937D1 (de) Polyimide.
DE3785141D1 (de) Photo-voltaische anordnung mit heterouebergaengen.
DE3784376D1 (de) Temperatur-kompensierte oszillatorschaltung.
DE3784407D1 (de) Flipflop-schaltung.
DE3779784D1 (de) Logische schaltung.
DE3788842D1 (de) Anordnung von Anschlüssen für eine integrierte Schaltung mit variabler Breite.
DE3679928D1 (de) Monolitisch integrierte mikrowellenschaltungsanordnung.
NL194811B (nl) Servoschakeling.
KR870007556A (ko) 고속 집적회로 취급기
DE3785400D1 (de) Schaltkreis mit hysterese.
DE3787395D1 (de) Parallele Berechnungsschaltung.
DE3672029D1 (de) Bipolarer integrierter schaltkreis mit heterouebergaengen.
DE68918301D1 (de) Passivierungsverfahren für eine integrierte Schaltung.
DE3750048D1 (de) Bauelement mit integrierter Schaltung und einer Zwischenschaltungsleitung.
DE3581159D1 (de) Halbleiteranordnung mit integrierter schaltung.

Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: UTMC MICROELECTRONIC SYSTEMS INC., COLORADO SPRING

8339 Ceased/non-payment of the annual fee