DE3778920D1 - Mikrorechner mit betriebsarten fuer hohe und fuer geringe taktrate. - Google Patents

Mikrorechner mit betriebsarten fuer hohe und fuer geringe taktrate.

Info

Publication number
DE3778920D1
DE3778920D1 DE8787100701T DE3778920T DE3778920D1 DE 3778920 D1 DE3778920 D1 DE 3778920D1 DE 8787100701 T DE8787100701 T DE 8787100701T DE 3778920 T DE3778920 T DE 3778920T DE 3778920 D1 DE3778920 D1 DE 3778920D1
Authority
DE
Germany
Prior art keywords
microcalculator
operating modes
clock rate
low clock
low
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE8787100701T
Other languages
English (en)
Inventor
Michiya C O Nec Corpo Nakamura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Electronics Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Application granted granted Critical
Publication of DE3778920D1 publication Critical patent/DE3778920D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3234—Power saving characterised by the action undertaken
    • G06F1/324—Power saving characterised by the action undertaken by lowering clock frequency
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
DE8787100701T 1986-01-20 1987-01-20 Mikrorechner mit betriebsarten fuer hohe und fuer geringe taktrate. Expired - Lifetime DE3778920D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1041986 1986-01-20

Publications (1)

Publication Number Publication Date
DE3778920D1 true DE3778920D1 (de) 1992-06-17

Family

ID=11749626

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8787100701T Expired - Lifetime DE3778920D1 (de) 1986-01-20 1987-01-20 Mikrorechner mit betriebsarten fuer hohe und fuer geringe taktrate.

Country Status (4)

Country Link
US (2) US4862348A (de)
EP (1) EP0230960B1 (de)
JP (1) JPH0715674B2 (de)
DE (1) DE3778920D1 (de)

Families Citing this family (26)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5483659A (en) * 1987-09-14 1996-01-09 Yamamura; Kimio Apparatus for controlling a signal processing system to operate in high and low speed modes
JP2749819B2 (ja) * 1987-10-26 1998-05-13 松下電工株式会社 共有メモリ制御方式
US5255193A (en) * 1988-05-12 1993-10-19 Nissan Motor Company Traction control system for controlling engine output and brake for maintaining optimum wheel traction with road friction level dependent brake control
JP2761600B2 (ja) * 1989-01-17 1998-06-04 三洋電機株式会社 コンピュータシステムメモリコントローラ
US5113511A (en) * 1989-06-02 1992-05-12 Atari Corporation System for dynamically providing predicted high/slow speed accessing memory to a processing unit based on instructions
US5222239A (en) * 1989-07-28 1993-06-22 Prof. Michael H. Davis Process and apparatus for reducing power usage microprocessor devices operating from stored energy sources
JPH04356799A (ja) * 1990-08-29 1992-12-10 Mitsubishi Electric Corp 半導体記憶装置
JPH05189976A (ja) * 1991-09-03 1993-07-30 Seiko Epson Corp 半導体装置及び電子機器
US5408639A (en) * 1992-07-21 1995-04-18 Advanced Micro Devices External memory access control for a processing system
GB2297398B (en) * 1995-01-17 1999-11-24 Advanced Risc Mach Ltd Accessing cache memories
US5530384A (en) * 1995-04-27 1996-06-25 Xilinx, Inc. Sense amplifier having selectable power and speed modes
JP2718399B2 (ja) * 1995-08-10 1998-02-25 日本電気株式会社 コンピュータ接続対応データ無線機
US5778428A (en) * 1995-12-22 1998-07-07 International Business Machines Corporation Programmable high performance mode for multi-way associative cache/memory designs
JPH10275140A (ja) * 1997-03-31 1998-10-13 Nec Ic Microcomput Syst Ltd マイクロコンピュータ
US7000065B2 (en) * 2002-01-02 2006-02-14 Intel Corporation Method and apparatus for reducing power consumption in a memory bus interface by selectively disabling and enabling sense amplifiers
US7152167B2 (en) * 2002-12-11 2006-12-19 Intel Corporation Apparatus and method for data bus power control
US7216240B2 (en) * 2002-12-11 2007-05-08 Intel Corporation Apparatus and method for address bus power control
US20040128416A1 (en) * 2002-12-11 2004-07-01 Tsvika Kurts Apparatus and method for address bus power control
US7529955B2 (en) * 2005-06-30 2009-05-05 Intel Corporation Dynamic bus parking
JP4557179B2 (ja) * 2006-08-04 2010-10-06 オムロン株式会社 マイクロコンピュータ装置
JP5266589B2 (ja) * 2009-05-14 2013-08-21 ルネサスエレクトロニクス株式会社 不揮発性半導体記憶装置
FR2947587A1 (fr) 2009-07-03 2011-01-07 Total Sa Procede d'extraction d'hydrocarbures par chauffage electromagnetique d'une formation souterraine in situ
EP4053840A1 (de) * 2010-02-23 2022-09-07 Rambus Inc. Verfahren und schaltungen zur dynamischen skalierung der dram-leistung und -performance
JP2015056198A (ja) * 2013-09-13 2015-03-23 株式会社東芝 メモリチップ、記憶装置および読み出し方法
JP5714149B2 (ja) * 2014-03-07 2015-05-07 ルネサスエレクトロニクス株式会社 不揮発性半導体記憶装置
CN104517645B (zh) * 2014-05-16 2019-08-13 上海华虹宏力半导体制造有限公司 闪存低速读模式控制电路

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3941989A (en) * 1974-12-13 1976-03-02 Mos Technology, Inc. Reducing power consumption in calculators
JPS533120A (en) * 1976-06-30 1978-01-12 Canon Inc Control circuit
JPS6019029B2 (ja) * 1978-03-29 1985-05-14 ブリテイツシユ・ブロ−ドキヤステイング・コ−ポレ−シヨン デジタル・デ−タ処理装置
JPS58107930A (ja) * 1981-12-22 1983-06-27 Fujitsu Ltd クロツク制御方式
US4508101A (en) * 1982-04-09 1985-04-02 Monsanto Company Thermal energy storage system
US4594657A (en) * 1983-04-22 1986-06-10 Motorola, Inc. Semaphore for memory shared by two asynchronous microcomputers
EP0134822B1 (de) * 1983-07-27 1988-07-20 Ibm Deutschland Gmbh Digitalspeicher
JPS6079593A (ja) * 1983-10-07 1985-05-07 Hitachi Ltd 半導体集積回路システム
JPS60175293A (ja) * 1984-02-21 1985-09-09 Toshiba Corp 半導体メモリ
US4727491A (en) * 1984-06-27 1988-02-23 Compaq Computer Corporation Personal computer having normal and high speed execution modes
US4807194A (en) * 1986-04-24 1989-02-21 Matsushita Electric Industrial Co., Ltd. Seimiconductor memory device having sub bit lines
US4807195A (en) * 1987-05-18 1989-02-21 International Business Machines Corporation Apparatus and method for providing a dual sense amplifier with divided bit line isolation

Also Published As

Publication number Publication date
US4930067A (en) 1990-05-29
JPH0715674B2 (ja) 1995-02-22
JPS63238649A (ja) 1988-10-04
EP0230960B1 (de) 1992-05-13
EP0230960A3 (en) 1988-04-20
EP0230960A2 (de) 1987-08-05
US4862348A (en) 1989-08-29

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: NEC ELECTRONICS CORP., KAWASAKI, KANAGAWA, JP