DE3689356D1 - Verfahren und Schaltung zum Generieren von binären Signalen und modifizierter Bitfolge. - Google Patents
Verfahren und Schaltung zum Generieren von binären Signalen und modifizierter Bitfolge.Info
- Publication number
- DE3689356D1 DE3689356D1 DE86309849T DE3689356T DE3689356D1 DE 3689356 D1 DE3689356 D1 DE 3689356D1 DE 86309849 T DE86309849 T DE 86309849T DE 3689356 T DE3689356 T DE 3689356T DE 3689356 D1 DE3689356 D1 DE 3689356D1
- Authority
- DE
- Germany
- Prior art keywords
- circuit
- bit sequence
- binary signals
- modified bit
- generating binary
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/50—Adding; Subtracting
- G06F7/505—Adding; Subtracting in bit-parallel fashion, i.e. having a different digit-handling circuit for each denomination
- G06F7/5055—Adding; Subtracting in bit-parallel fashion, i.e. having a different digit-handling circuit for each denomination in which one operand is a constant, i.e. incrementers or decrementers
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
- G06F17/10—Complex mathematical operations
- G06F17/14—Fourier, Walsh or analogous domain transformations, e.g. Laplace, Hilbert, Karhunen-Loeve, transforms
- G06F17/141—Discrete Fourier transforms
- G06F17/142—Fast Fourier transforms, e.g. using a Cooley-Tukey type algorithm
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/50—Adding; Subtracting
- G06F7/501—Half or full adders, i.e. basic adder cells for one denomination
- G06F7/503—Half or full adders, i.e. basic adder cells for one denomination using carry switching, i.e. the incoming carry being connected directly, or only via an inverter, to the carry output under control of a carry propagate signal
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2207/00—Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F2207/38—Indexing scheme relating to groups G06F7/38 - G06F7/575
- G06F2207/3804—Details
- G06F2207/3808—Details concerning the type of numbers or the way they are handled
- G06F2207/3852—Calculation with most significant digit first
Landscapes
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Computational Mathematics (AREA)
- Mathematical Analysis (AREA)
- Pure & Applied Mathematics (AREA)
- Mathematical Physics (AREA)
- Mathematical Optimization (AREA)
- General Engineering & Computer Science (AREA)
- Computing Systems (AREA)
- Data Mining & Analysis (AREA)
- Discrete Mathematics (AREA)
- Algebra (AREA)
- Databases & Information Systems (AREA)
- Software Systems (AREA)
- Complex Calculations (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP60290093A JP2610417B2 (ja) | 1985-12-23 | 1985-12-23 | アドレス信号生成方法及びその回路 |
Publications (2)
Publication Number | Publication Date |
---|---|
DE3689356D1 true DE3689356D1 (de) | 1994-01-13 |
DE3689356T2 DE3689356T2 (de) | 1994-06-16 |
Family
ID=17751704
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE3689356T Expired - Lifetime DE3689356T2 (de) | 1985-12-23 | 1986-12-17 | Verfahren und Schaltung zum Generieren von binären Signalen und modifizierter Bitfolge. |
Country Status (4)
Country | Link |
---|---|
US (1) | US4831570A (de) |
EP (1) | EP0227427B1 (de) |
JP (1) | JP2610417B2 (de) |
DE (1) | DE3689356T2 (de) |
Families Citing this family (16)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH01180633A (ja) * | 1988-01-12 | 1989-07-18 | Mitsubishi Electric Corp | 加算器 |
US4974188A (en) * | 1988-12-09 | 1990-11-27 | The Johns Hopkins University | Address sequence generation by means of reverse carry addition |
US4972358A (en) * | 1989-06-08 | 1990-11-20 | General Electric Company | Computation of discrete fourier transform using recursive techniques |
US5048021A (en) * | 1989-08-28 | 1991-09-10 | At&T Bell Laboratories | Method and apparatus for generating control signals |
JPH0391832A (ja) * | 1989-09-05 | 1991-04-17 | Sony Corp | 加算回路 |
US5027310A (en) * | 1989-09-08 | 1991-06-25 | Zilog, Inc. | Carry chain incrementer and/or decrementer circuit |
US5177691A (en) * | 1990-11-30 | 1993-01-05 | General Electric Company | Measuring velocity of a target by Doppler shift, using improvements in calculating discrete Fourier transform |
JPH04230521A (ja) * | 1990-12-29 | 1992-08-19 | Nec Corp | ビット反転演算器 |
US5233553A (en) * | 1991-03-06 | 1993-08-03 | Chips And Technologies, Inc. | Apparatus for performing modulo arithmetic with three-port adder |
US5309381A (en) * | 1991-04-10 | 1994-05-03 | Ricoh Company, Ltd. | Probability estimation table apparatus |
JP2950703B2 (ja) * | 1992-04-30 | 1999-09-20 | シャープ株式会社 | 高速フーリエ変換用ディジット反転のためのアドレス発生器及び反転フィールドシーケンス発生器並びにディジット反転シーケンス信号発生方法 |
US5270955A (en) * | 1992-07-31 | 1993-12-14 | Texas Instruments Incorporated | Method of detecting arithmetic or logical computation result |
US5450560A (en) * | 1992-12-21 | 1995-09-12 | Motorola, Inc. | Pointer for use with a buffer and method of operation |
JPH0816364A (ja) * | 1994-04-26 | 1996-01-19 | Nec Corp | カウンタ回路とそれを用いたマイクロプロセッサ |
US5875121A (en) * | 1996-08-06 | 1999-02-23 | Hewlett-Packard Company | Register selection system and method |
US6131108A (en) * | 1998-03-31 | 2000-10-10 | Lsi Logic Corporation | Apparatus, and associated method, for generating multi-bit length sequences |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3748451A (en) * | 1970-08-21 | 1973-07-24 | Control Data Corp | General purpose matrix processor with convolution capabilities |
US3731284A (en) * | 1971-12-27 | 1973-05-01 | Bell Telephone Labor Inc | Method and apparatus for reordering data |
US4181976A (en) * | 1978-10-10 | 1980-01-01 | Raytheon Company | Bit reversing apparatus |
US4393457A (en) * | 1981-03-26 | 1983-07-12 | Advanced Micro Devices, Inc. | Method and apparatus for sequencing addresses of a fast Fourier transform array |
US4602350A (en) * | 1981-10-13 | 1986-07-22 | Trw Inc. | Data reordering memory for use in prime factor transform |
JPS5965376A (ja) * | 1982-10-05 | 1984-04-13 | Nippon Telegr & Teleph Corp <Ntt> | アドレス制御回路 |
-
1985
- 1985-12-23 JP JP60290093A patent/JP2610417B2/ja not_active Expired - Lifetime
-
1986
- 1986-11-26 US US06/935,465 patent/US4831570A/en not_active Expired - Lifetime
- 1986-12-17 EP EP86309849A patent/EP0227427B1/de not_active Expired - Lifetime
- 1986-12-17 DE DE3689356T patent/DE3689356T2/de not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
US4831570A (en) | 1989-05-16 |
JP2610417B2 (ja) | 1997-05-14 |
DE3689356T2 (de) | 1994-06-16 |
JPS62147569A (ja) | 1987-07-01 |
EP0227427B1 (de) | 1993-12-01 |
EP0227427A2 (de) | 1987-07-01 |
EP0227427A3 (en) | 1990-04-04 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
DE68915950D1 (de) | Verfahren zum Trennen von Zeichen. | |
DE3580946D1 (de) | Verfahren und system zum verstehen und belegen von schaltungsmustern. | |
DE3680824D1 (de) | Verfahren zum erzeugen von graphit. | |
DE3689062D1 (de) | Verfahren und Vorrichtung zum Erzeugen von Hochauflösungsbinärbilddaten. | |
DE3852652D1 (de) | Verfahren zum zersetzen von ammoniak. | |
DE3682928D1 (de) | Verfahren zum polymerisieren von aethylen. | |
DE3770318D1 (de) | Anisotrope elektrizitaetsleitende klebstoffzusammensetzung, verfahren zum verbinden von stromkreisen und die so erhaltenen stromkreise. | |
DE3672059D1 (de) | Verfahren zum komprimieren von zwei-pegeldaten. | |
DE3771110D1 (de) | Verfahren und geraet zum gruppieren von gegenstaenden. | |
DE3689356D1 (de) | Verfahren und Schaltung zum Generieren von binären Signalen und modifizierter Bitfolge. | |
DE3880547D1 (de) | System und verfahren zum kodieren von gegenstaenden. | |
DE3673102D1 (de) | Verfahren zum stabilisieren von organopolysiloxanen. | |
DE3689241D1 (de) | Verfahren und Vorrichtung zum Protokollieren von Systemkonfigurationen. | |
DE3855860D1 (de) | Schaltungsveränderungssystem und -verfahren, Verfahren zur Erzeugung von invertierter Logik und Logikentwurfssystem | |
DE3672368D1 (de) | Verfahren und anordnung zur aufzeichnung von pcm-signalen. | |
DE3771670D1 (de) | Verfahren zum entschleimen von triglyceridoelen. | |
DE3688517D1 (de) | Anpassungsfaehiges verfahren zum komprimieren von zeichendaten. | |
DE3583843D1 (de) | Verfahren zum zementieren von bohrloechern und zusammensetzungen. | |
DE3688641D1 (de) | Schaltung und verfahren zum komprimieren von wellenformdaten. | |
DE3581226D1 (de) | Verfahren und einrichtung zum schmelzen von metallbloecken. | |
DE3673676D1 (de) | Schnittstellenschaltung zum senden und empfangen von daten. | |
DE3780494D1 (de) | Geraet und verfahren zum drucken von information. | |
DE3667781D1 (de) | Verfahren zum verbinden von keramischen gegenstaenden. | |
DE68912557D1 (de) | Verfahren und gerät zum lesen von zeichen. | |
DE3483355D1 (de) | Vorrichtungen und verfahren zum eintreiben von projektilen. |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition |