DE3688462D1 - System zur einstellung der taktphase. - Google Patents

System zur einstellung der taktphase.

Info

Publication number
DE3688462D1
DE3688462D1 DE8686905405T DE3688462T DE3688462D1 DE 3688462 D1 DE3688462 D1 DE 3688462D1 DE 8686905405 T DE8686905405 T DE 8686905405T DE 3688462 T DE3688462 T DE 3688462T DE 3688462 D1 DE3688462 D1 DE 3688462D1
Authority
DE
Germany
Prior art keywords
clock phase
setting system
phase setting
clock
setting
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE8686905405T
Other languages
English (en)
Other versions
DE3688462T2 (de
Inventor
Tatsuro Yoshimura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Publication of DE3688462D1 publication Critical patent/DE3688462D1/de
Application granted granted Critical
Publication of DE3688462T2 publication Critical patent/DE3688462T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
    • G06F1/10—Distribution of clock signals, e.g. skew

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)
  • Pulse Circuits (AREA)
DE8686905405T 1985-09-04 1986-09-04 System zur einstellung der taktphase. Expired - Fee Related DE3688462T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP60195171A JPS6270922A (ja) 1985-09-04 1985-09-04 クロツク位相調整方式
PCT/JP1986/000450 WO1987001479A1 (en) 1985-09-04 1986-09-04 System for adjusting clock phase

Publications (2)

Publication Number Publication Date
DE3688462D1 true DE3688462D1 (de) 1993-06-24
DE3688462T2 DE3688462T2 (de) 1993-08-26

Family

ID=16336619

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8686905405T Expired - Fee Related DE3688462T2 (de) 1985-09-04 1986-09-04 System zur einstellung der taktphase.

Country Status (8)

Country Link
US (1) US4859954A (de)
EP (1) EP0235303B1 (de)
JP (1) JPS6270922A (de)
KR (1) KR900002947B1 (de)
AU (1) AU578546B2 (de)
BR (1) BR8606853A (de)
DE (1) DE3688462T2 (de)
WO (1) WO1987001479A1 (de)

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
AU605562B2 (en) * 1987-04-10 1991-01-17 Computervision Corporation Clock skew avoidance technique for pipeline processors
US5065041A (en) * 1989-01-05 1991-11-12 Bull Hn Information Systems Inc. Timing generator module
US5293626A (en) * 1990-06-08 1994-03-08 Cray Research, Inc. Clock distribution apparatus and processes particularly useful in multiprocessor systems
JPH04157379A (ja) * 1990-10-20 1992-05-29 Fujitsu Ltd 遅延測定方式
US5111086A (en) * 1990-11-19 1992-05-05 Wang Laboratories, Inc. Adjusting delay circuitry
US5382850A (en) * 1992-09-23 1995-01-17 Amdahl Corporation Selectable timing delay system
SE500929C2 (sv) * 1993-02-24 1994-10-03 Ellemtel Utvecklings Ab Signalbehandlingskrets och förfarande för fördröjning av en binär periodisk insignal
SE501190C2 (sv) * 1993-04-28 1994-12-05 Ellemtel Utvecklings Ab Digitalt styrd kristalloscillator
DE4326062C1 (de) * 1993-08-03 1994-08-18 Siemens Ag Phasenregelanordnung
JP3553639B2 (ja) * 1994-05-12 2004-08-11 アジレント・テクノロジーズ・インク タイミング調整回路
US6081147A (en) * 1994-09-29 2000-06-27 Fujitsu Limited Timing controller and controlled delay circuit for controlling timing or delay time of a signal by changing phase thereof
DE69633042T2 (de) * 1995-03-13 2005-07-21 Sumitomo Chemical Co., Ltd. Geräuschdämmendes bauteil
KR100548225B1 (ko) * 2003-12-24 2006-02-02 삼성전자주식회사 피딩 시간간격 조절 기능을 갖는 화상형성장치 및 그 방법
CN106959934B (zh) * 2017-02-21 2021-03-30 深圳市紫光同创电子有限公司 低电压差分信号接收接口及低电压差分信号接收方法

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB201055A (en) * 1922-08-14 1923-07-26 Leich Electric Co Improvements in and relating to rotary electric ignition current distributors or timers
JPS5390834A (en) * 1977-01-21 1978-08-10 Hitachi Ltd Lsi logic circuit containig timing pulse switching circuit
US4165490A (en) * 1977-12-19 1979-08-21 International Business Machines Corporation Clock pulse generator with selective pulse delay and pulse width control
US4290022A (en) * 1979-04-16 1981-09-15 General Electric Company Digitally programmable phase shifter
JPS55146501A (en) * 1979-05-04 1980-11-14 Nissan Motor Co Ltd Digital control device for internal combustion engine
JPS5696526A (en) * 1979-12-28 1981-08-04 Fujitsu Ltd Timing signal generating system
JPS58218229A (ja) * 1982-06-11 1983-12-19 Fujitsu Ltd 遅延時間選定回路
IE840430L (en) * 1983-02-28 1984-08-28 Deere & Co Computer control system
JPS59158208A (ja) 1983-02-28 1984-09-07 松下電工株式会社 繊維セメント板の製法
US4580137A (en) * 1983-08-29 1986-04-01 International Business Machines Corporation LSSD-testable D-type edge-trigger-operable latch with overriding set/reset asynchronous control
US4546269A (en) * 1983-12-01 1985-10-08 Control Data Corporation Method and apparatus for optimally tuning clock signals for digital computers
US4580066A (en) * 1984-03-22 1986-04-01 Sperry Corporation Fast scan/set testable latch using two levels of series gating with two current sources
JPS60219675A (ja) * 1984-04-13 1985-11-02 Sony Corp 時間軸変換回路
US4700347A (en) * 1985-02-13 1987-10-13 Bolt Beranek And Newman Inc. Digital phase adjustment
JPH0669722A (ja) * 1992-08-18 1994-03-11 Nippon Antenna Kk マルチビームアンテナ

Also Published As

Publication number Publication date
EP0235303A1 (de) 1987-09-09
AU578546B2 (en) 1988-10-27
BR8606853A (pt) 1987-11-03
KR880700351A (ko) 1988-02-22
DE3688462T2 (de) 1993-08-26
WO1987001479A1 (en) 1987-03-12
EP0235303A4 (de) 1988-05-31
US4859954A (en) 1989-08-22
KR900002947B1 (ko) 1990-05-03
JPS6270922A (ja) 1987-04-01
EP0235303B1 (de) 1993-05-19
AU6287986A (en) 1987-03-24

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee